From d24981d37e793b0a8fcde1879db19eb11fe0f975 Mon Sep 17 00:00:00 2001
From: Juan Quintela <quintela@redhat.com>
Date: Tue, 22 May 2012 00:42:40 +0200
Subject: [PATCH] Only TCG needs TLB handling
Refactor the code that is only needed for tcg to an static function.
Call that only when tcg is enabled. We can't refactor to a dummy
function in the kvm case, as qemu can be compiled at the same time
with tcg and kvm.
Signed-off-by: Juan Quintela <quintela@redhat.com>
---
exec.c | 35 +++++++++++++++++++++++------------
1 file changed, 23 insertions(+), 12 deletions(-)
diff --git a/exec.c b/exec.c
index 8244d54a85..a68b65cb4e 100644
--- a/exec.c
+++ b/exec.c
@@ -1824,19 +1824,10 @@ void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr)
TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *));
}
-/* Note: start and end must be within the same ram block. */
-void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
- int dirty_flags)
+static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t end,
+ uintptr_t length)
{
- uintptr_t length, start1;
-
- start &= TARGET_PAGE_MASK;
- end = TARGET_PAGE_ALIGN(end);
-
- length = end - start;
- if (length == 0)
- return;
- cpu_physical_memory_mask_dirty_range(start, length, dirty_flags);
+ uintptr_t start1;
/* we modify the TLB cache so that the dirty bit will be set again
when accessing the range */
@@ -1848,6 +1839,26 @@ void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
abort();
}
cpu_tlb_reset_dirty_all(start1, length);
+
+}
+
+/* Note: start and end must be within the same ram block. */
+void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
+ int dirty_flags)
+{
+ uintptr_t length;
+
+ start &= TARGET_PAGE_MASK;
+ end = TARGET_PAGE_ALIGN(end);
+
+ length = end - start;
+ if (length == 0)
+ return;
+ cpu_physical_memory_mask_dirty_range(start, length, dirty_flags);
+
+ if (tcg_enabled()) {
+ tlb_reset_dirty_range_all(start, end, length);
+ }
}
int cpu_physical_memory_set_dirty_tracking(int enable)