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MIPS patches 2015-03-18 

Changes:
 * bug fixes
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Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150318' into staging

MIPS patches 2015-03-18

Changes:
* bug fixes

# gpg: Signature made Wed Mar 18 10:06:00 2015 GMT using RSA key ID 0B29DA6B
# gpg: Can't check signature: public key not found

* remotes/lalrae/tags/mips-20150318:
  target-mips: save cpu state before calling MSA load and store helpers
  target-mips: fix hflags modified in delay / forbidden slot
  target-mips: fix CP0.BadVAddr by stopping translation on Address Error

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2015-03-19 13:04:07 +00:00
parent 1cfa7e0ab2 0af7a37054
commit d88aec88cd
1 changed files with 18 additions and 4 deletions
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22
target-mips/translate.c
View File

@ -10531,14 +10531,25 @@ static void gen_rdhwr(DisasContext *ctx, int rt, int rd)
tcg_temp_free(t0);
}
static inline void clear_branch_hflags(DisasContext *ctx)
{
ctx->hflags &= ~MIPS_HFLAG_BMASK;
if (ctx->bstate == BS_NONE) {
save_cpu_state(ctx, 0);
} else {
/* it is not safe to save ctx->hflags as hflags may be changed
in execution time by the instruction in delay / forbidden slot. */
tcg_gen_andi_i32(hflags, hflags, ~MIPS_HFLAG_BMASK);
}
}
static void gen_branch(DisasContext *ctx, int insn_bytes)
{
if (ctx->hflags & MIPS_HFLAG_BMASK) {
int proc_hflags = ctx->hflags & MIPS_HFLAG_BMASK;
/* Branches completion */
ctx->hflags &= ~MIPS_HFLAG_BMASK;
clear_branch_hflags(ctx);
ctx->bstate = BS_BRANCH;
save_cpu_state(ctx, 0);
/* FIXME: Need to clear can_do_io. */
switch (proc_hflags & MIPS_HFLAG_BMASK_BASE) {
case MIPS_HFLAG_FBNSLOT:
@ -10596,8 +10607,8 @@ static void gen_branch(DisasContext *ctx, int insn_bytes)
tcg_gen_exit_tb(0);
break;
default:
MIPS_DEBUG("unknown branch");
break;
fprintf(stderr, "unknown branch 0x%x\n", proc_hflags);
abort();
}
}
}
@ -18403,12 +18414,14 @@ static void gen_msa(CPUMIPSState *env, DisasContext *ctx)
case OPC_LD_H:
case OPC_LD_W:
case OPC_LD_D:
save_cpu_state(ctx, 1);
gen_helper_msa_ld_df(cpu_env, tdf, twd, trs, ts10);
break;
case OPC_ST_B:
case OPC_ST_H:
case OPC_ST_W:
case OPC_ST_D:
save_cpu_state(ctx, 1);
gen_helper_msa_st_df(cpu_env, tdf, twd, trs, ts10);
break;
}
@ -18438,6 +18451,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
if (ctx->pc & 0x3) {
env->CP0_BadVAddr = ctx->pc;
generate_exception_err(ctx, EXCP_AdEL, EXCP_INST_NOTAVAIL);
ctx->bstate = BS_STOP;
return;
}