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qemu
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Reindent 

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2009-05-03 18:51:22 +00:00
parent 03f311edd3
commit dc1a6971e3
1 changed files with 312 additions and 319 deletions
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27
target-sparc/translate.c
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@ -2098,8 +2098,8 @@ static void disas_sparc_insn(DisasContext * dc)
break;
}
break;
case 1:
/*CALL*/ {
case 1: /*CALL*/
{
target_long target = GET_FIELDs(insn, 2, 31) << 2;
TCGv r_const;
@ -2491,8 +2491,7 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0x41: /* fadds */
gen_clear_float_exceptions();
gen_helper_fadds(cpu_tmp32,
cpu_fpr[rs1], cpu_fpr[rs2]);
gen_helper_fadds(cpu_tmp32, cpu_fpr[rs1], cpu_fpr[rs2]);
gen_helper_check_ieee_exceptions();
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
@ -2515,8 +2514,7 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0x45: /* fsubs */
gen_clear_float_exceptions();
gen_helper_fsubs(cpu_tmp32,
cpu_fpr[rs1], cpu_fpr[rs2]);
gen_helper_fsubs(cpu_tmp32, cpu_fpr[rs1], cpu_fpr[rs2]);
gen_helper_check_ieee_exceptions();
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
@ -2540,8 +2538,7 @@ static void disas_sparc_insn(DisasContext * dc)
case 0x49: /* fmuls */
CHECK_FPU_FEATURE(dc, FMUL);
gen_clear_float_exceptions();
gen_helper_fmuls(cpu_tmp32,
cpu_fpr[rs1], cpu_fpr[rs2]);
gen_helper_fmuls(cpu_tmp32, cpu_fpr[rs1], cpu_fpr[rs2]);
gen_helper_check_ieee_exceptions();
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
@ -2566,8 +2563,7 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0x4d: /* fdivs */
gen_clear_float_exceptions();
gen_helper_fdivs(cpu_tmp32,
cpu_fpr[rs1], cpu_fpr[rs2]);
gen_helper_fdivs(cpu_tmp32, cpu_fpr[rs1], cpu_fpr[rs2]);
gen_helper_check_ieee_exceptions();
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
@ -2680,15 +2676,13 @@ static void disas_sparc_insn(DisasContext * dc)
break;
#ifdef TARGET_SPARC64
case 0x2: /* V9 fmovd */
tcg_gen_mov_i32(cpu_fpr[DFPREG(rd)],
cpu_fpr[DFPREG(rs2)]);
tcg_gen_mov_i32(cpu_fpr[DFPREG(rd)], cpu_fpr[DFPREG(rs2)]);
tcg_gen_mov_i32(cpu_fpr[DFPREG(rd) + 1],
cpu_fpr[DFPREG(rs2) + 1]);
break;
case 0x3: /* V9 fmovq */
CHECK_FPU_FEATURE(dc, FLOAT128);
tcg_gen_mov_i32(cpu_fpr[QFPREG(rd)],
cpu_fpr[QFPREG(rs2)]);
tcg_gen_mov_i32(cpu_fpr[QFPREG(rd)], cpu_fpr[QFPREG(rs2)]);
tcg_gen_mov_i32(cpu_fpr[QFPREG(rd) + 1],
cpu_fpr[QFPREG(rs2) + 1]);
tcg_gen_mov_i32(cpu_fpr[QFPREG(rd) + 2],
@ -4629,7 +4623,7 @@ static void disas_sparc_insn(DisasContext * dc)
default:
goto illegal_insn;
}
} else if (xop < 8 || (xop >= 0x14 && xop < 0x18) || \
} else if (xop < 8 || (xop >= 0x14 && xop < 0x18) ||
xop == 0xe || xop == 0x1e) {
gen_movl_reg_TN(rd, cpu_val);
switch (xop) {
@ -4822,8 +4816,7 @@ static void disas_sparc_insn(DisasContext * dc)
default:
goto illegal_insn;
}
}
else
} else
goto illegal_insn;
}
break;