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target-arm: Fix lpae bit in FSR on an alignment fault 

If an alignment fault occurred and target EL is using AArch32,
then DFSR/IFSR bit LPAE[9] must be set correctly.

Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
Message-id: 1471283293-169850-1-git-send-email-afarallax@yandex.ru
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Sergey Sorokin 2016-09-06 19:52:17 +01:00 committed by Peter Maydell
parent c2da8a8b90
commit e0fe723c24
1 changed files with 1 additions and 1 deletions
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2
target-arm/op_helper.c
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@ -194,7 +194,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
* the LPAE long descriptor format, or the short descriptor format
*/
if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) {
env->exception.fsr = 0x21;
env->exception.fsr = (1 << 9) | 0x21;
} else {
env->exception.fsr = 0x1;
}