mirror of https://gitee.com/openkylin/qemu.git
arm_timer: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
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460d7c53cd
commit
e219dea2f3
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@ -176,6 +176,7 @@ static arm_timer_state *arm_timer_init(uint32_t freq)
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typedef struct {
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SysBusDevice busdev;
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MemoryRegion iomem;
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arm_timer_state *timer[2];
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int level[2];
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qemu_irq irq;
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@ -190,7 +191,8 @@ static void sp804_set_irq(void *opaque, int irq, int level)
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qemu_set_irq(s->irq, s->level[0] || s->level[1]);
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}
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static uint32_t sp804_read(void *opaque, target_phys_addr_t offset)
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static uint64_t sp804_read(void *opaque, target_phys_addr_t offset,
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unsigned size)
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{
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sp804_state *s = (sp804_state *)opaque;
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@ -203,7 +205,7 @@ static uint32_t sp804_read(void *opaque, target_phys_addr_t offset)
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}
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static void sp804_write(void *opaque, target_phys_addr_t offset,
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uint32_t value)
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uint64_t value, unsigned size)
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{
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sp804_state *s = (sp804_state *)opaque;
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@ -214,19 +216,12 @@ static void sp804_write(void *opaque, target_phys_addr_t offset,
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}
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}
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static CPUReadMemoryFunc * const sp804_readfn[] = {
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sp804_read,
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sp804_read,
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sp804_read
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static const MemoryRegionOps sp804_ops = {
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.read = sp804_read,
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.write = sp804_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static CPUWriteMemoryFunc * const sp804_writefn[] = {
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sp804_write,
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sp804_write,
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sp804_write
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};
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static const VMStateDescription vmstate_sp804 = {
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.name = "sp804",
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.version_id = 1,
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@ -240,7 +235,6 @@ static const VMStateDescription vmstate_sp804 = {
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static int sp804_init(SysBusDevice *dev)
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{
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int iomemtype;
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sp804_state *s = FROM_SYSBUS(sp804_state, dev);
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qemu_irq *qi;
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@ -252,9 +246,8 @@ static int sp804_init(SysBusDevice *dev)
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s->timer[1] = arm_timer_init(1000000);
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s->timer[0]->irq = qi[0];
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s->timer[1]->irq = qi[1];
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iomemtype = cpu_register_io_memory(sp804_readfn,
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sp804_writefn, s, DEVICE_NATIVE_ENDIAN);
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sysbus_init_mmio(dev, 0x1000, iomemtype);
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memory_region_init_io(&s->iomem, &sp804_ops, s, "sp804", 0x1000);
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sysbus_init_mmio_region(dev, &s->iomem);
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vmstate_register(&dev->qdev, -1, &vmstate_sp804, s);
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return 0;
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}
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@ -264,10 +257,12 @@ static int sp804_init(SysBusDevice *dev)
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typedef struct {
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SysBusDevice busdev;
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MemoryRegion iomem;
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arm_timer_state *timer[3];
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} icp_pit_state;
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static uint32_t icp_pit_read(void *opaque, target_phys_addr_t offset)
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static uint64_t icp_pit_read(void *opaque, target_phys_addr_t offset,
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unsigned size)
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{
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icp_pit_state *s = (icp_pit_state *)opaque;
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int n;
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@ -282,7 +277,7 @@ static uint32_t icp_pit_read(void *opaque, target_phys_addr_t offset)
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}
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static void icp_pit_write(void *opaque, target_phys_addr_t offset,
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uint32_t value)
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uint64_t value, unsigned size)
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{
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icp_pit_state *s = (icp_pit_state *)opaque;
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int n;
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@ -295,22 +290,14 @@ static void icp_pit_write(void *opaque, target_phys_addr_t offset,
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arm_timer_write(s->timer[n], offset & 0xff, value);
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}
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static CPUReadMemoryFunc * const icp_pit_readfn[] = {
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icp_pit_read,
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icp_pit_read,
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icp_pit_read
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};
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static CPUWriteMemoryFunc * const icp_pit_writefn[] = {
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icp_pit_write,
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icp_pit_write,
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icp_pit_write
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static const MemoryRegionOps icp_pit_ops = {
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.read = icp_pit_read,
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.write = icp_pit_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static int icp_pit_init(SysBusDevice *dev)
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{
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int iomemtype;
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icp_pit_state *s = FROM_SYSBUS(icp_pit_state, dev);
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/* Timer 0 runs at the system clock speed (40MHz). */
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@ -323,10 +310,8 @@ static int icp_pit_init(SysBusDevice *dev)
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sysbus_init_irq(dev, &s->timer[1]->irq);
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sysbus_init_irq(dev, &s->timer[2]->irq);
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iomemtype = cpu_register_io_memory(icp_pit_readfn,
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icp_pit_writefn, s,
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DEVICE_NATIVE_ENDIAN);
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sysbus_init_mmio(dev, 0x1000, iomemtype);
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memory_region_init_io(&s->iomem, &icp_pit_ops, s, "icp_pit", 0x1000);
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sysbus_init_mmio_region(dev, &s->iomem);
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/* This device has no state to save/restore. The component timers will
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save themselves. */
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return 0;
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