mirror of https://gitee.com/openkylin/qemu.git
hw/arm/virt: Silence dtc /memory warning
When running dtc on the guest /proc/device-tree we get the following warning: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name". Let's fix that by adding the unit address to the node name. We also don't create the /memory node anymore in create_fdt(). We directly create it in load_dtb. /chosen still needs to be created in create_fdt as the uart needs it. In case the user provided his own dtb, we nop all memory nodes found in root and create new one(s). Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 1530044492-24921-4-git-send-email-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -490,11 +490,13 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
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hwaddr addr_limit, AddressSpace *as)
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hwaddr addr_limit, AddressSpace *as)
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{
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{
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void *fdt = NULL;
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void *fdt = NULL;
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int size, rc;
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int size, rc, n = 0;
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uint32_t acells, scells;
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uint32_t acells, scells;
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char *nodename;
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char *nodename;
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unsigned int i;
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unsigned int i;
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hwaddr mem_base, mem_len;
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hwaddr mem_base, mem_len;
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char **node_path;
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Error *err = NULL;
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if (binfo->dtb_filename) {
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if (binfo->dtb_filename) {
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char *filename;
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char *filename;
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@ -546,12 +548,21 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
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goto fail;
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goto fail;
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}
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}
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/* nop all root nodes matching /memory or /memory@unit-address */
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node_path = qemu_fdt_node_unit_path(fdt, "memory", &err);
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if (err) {
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error_report_err(err);
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goto fail;
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}
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while (node_path[n]) {
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if (g_str_has_prefix(node_path[n], "/memory")) {
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qemu_fdt_nop_node(fdt, node_path[n]);
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}
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n++;
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}
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g_strfreev(node_path);
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if (nb_numa_nodes > 0) {
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if (nb_numa_nodes > 0) {
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/*
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* Turn the /memory node created before into a NOP node, then create
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* /memory@addr nodes for all numa nodes respectively.
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*/
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qemu_fdt_nop_node(fdt, "/memory");
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mem_base = binfo->loader_start;
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mem_base = binfo->loader_start;
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for (i = 0; i < nb_numa_nodes; i++) {
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for (i = 0; i < nb_numa_nodes; i++) {
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mem_len = numa_info[i].node_mem;
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mem_len = numa_info[i].node_mem;
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@ -572,24 +583,18 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
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g_free(nodename);
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g_free(nodename);
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}
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}
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} else {
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} else {
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Error *err = NULL;
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nodename = g_strdup_printf("/memory@%" PRIx64, binfo->loader_start);
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qemu_fdt_add_subnode(fdt, nodename);
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qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory");
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rc = fdt_path_offset(fdt, "/memory");
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rc = qemu_fdt_setprop_sized_cells(fdt, nodename, "reg",
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if (rc < 0) {
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qemu_fdt_add_subnode(fdt, "/memory");
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}
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if (!qemu_fdt_getprop(fdt, "/memory", "device_type", NULL, &err)) {
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qemu_fdt_setprop_string(fdt, "/memory", "device_type", "memory");
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}
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rc = qemu_fdt_setprop_sized_cells(fdt, "/memory", "reg",
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acells, binfo->loader_start,
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acells, binfo->loader_start,
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scells, binfo->ram_size);
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scells, binfo->ram_size);
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if (rc < 0) {
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if (rc < 0) {
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fprintf(stderr, "couldn't set /memory/reg\n");
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fprintf(stderr, "couldn't set %s reg\n", nodename);
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goto fail;
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goto fail;
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}
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}
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g_free(nodename);
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}
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}
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rc = fdt_path_offset(fdt, "/chosen");
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rc = fdt_path_offset(fdt, "/chosen");
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@ -204,13 +204,8 @@ static void create_fdt(VirtMachineState *vms)
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qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 0x2);
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qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 0x2);
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qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x2);
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qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x2);
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/*
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/* /chosen must exist for load_dtb to fill in necessary properties later */
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* /chosen and /memory nodes must exist for load_dtb
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* to fill in necessary properties later
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*/
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qemu_fdt_add_subnode(fdt, "/chosen");
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qemu_fdt_add_subnode(fdt, "/chosen");
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qemu_fdt_add_subnode(fdt, "/memory");
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qemu_fdt_setprop_string(fdt, "/memory", "device_type", "memory");
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/* Clock node, for the benefit of the UART. The kernel device tree
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/* Clock node, for the benefit of the UART. The kernel device tree
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* binding documentation claims the PL011 node clock properties are
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* binding documentation claims the PL011 node clock properties are
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