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softfloat: define 680x0 specific values 

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <20170611231633.32582-2-laurent@vivier.eu>
This commit is contained in:
Laurent Vivier 2017-06-12 01:16:27 +02:00
parent 043b936ef6
commit e5b0cbe8e8
1 changed files with 31 additions and 3 deletions
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34
fpu/softfloat-specialize.h
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@ -111,7 +111,7 @@ float16 float16_default_nan(float_status *status)
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
float32 float32_default_nan(float_status *status) float32 float32_default_nan(float_status *status)
{ {
#if defined(TARGET_SPARC) #if defined(TARGET_SPARC) || defined(TARGET_M68K)
return const_float32(0x7FFFFFFF); return const_float32(0x7FFFFFFF);
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \ #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
defined(TARGET_XTENSA) || defined(TARGET_S390X) || defined(TARGET_TRICORE) defined(TARGET_XTENSA) || defined(TARGET_S390X) || defined(TARGET_TRICORE)
@ -136,7 +136,7 @@ float32 float32_default_nan(float_status *status)
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
float64 float64_default_nan(float_status *status) float64 float64_default_nan(float_status *status)
{ {
#if defined(TARGET_SPARC) #if defined(TARGET_SPARC) || defined(TARGET_M68K)
return const_float64(LIT64(0x7FFFFFFFFFFFFFFF)); return const_float64(LIT64(0x7FFFFFFFFFFFFFFF));
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \ #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
defined(TARGET_S390X) defined(TARGET_S390X)
@ -162,7 +162,10 @@ float64 float64_default_nan(float_status *status)
floatx80 floatx80_default_nan(float_status *status) floatx80 floatx80_default_nan(float_status *status)
{ {
floatx80 r; floatx80 r;
#if defined(TARGET_M68K)
r.low = LIT64(0xFFFFFFFFFFFFFFFF);
r.high = 0x7FFF;
#else
if (status->snan_bit_is_one) { if (status->snan_bit_is_one) {
r.low = LIT64(0xBFFFFFFFFFFFFFFF); r.low = LIT64(0xBFFFFFFFFFFFFFFF);
r.high = 0x7FFF; r.high = 0x7FFF;
@ -170,6 +173,7 @@ floatx80 floatx80_default_nan(float_status *status)
r.low = LIT64(0xC000000000000000); r.low = LIT64(0xC000000000000000);
r.high = 0xFFFF; r.high = 0xFFFF;
} }
#endif
return r; return r;
} }
@ -502,6 +506,30 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
return 1; return 1;
} }
} }
#elif defined(TARGET_M68K)
static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
flag aIsLargerSignificand)
{
/* M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL
* 3.4 FLOATING-POINT INSTRUCTION DETAILS
* If either operand, but not both operands, of an operation is a
* nonsignaling NaN, then that NaN is returned as the result. If both
* operands are nonsignaling NaNs, then the destination operand
* nonsignaling NaN is returned as the result.
* If either operand to an operation is a signaling NaN (SNaN), then the
* SNaN bit is set in the FPSR EXC byte. If the SNaN exception enable bit
* is set in the FPCR ENABLE byte, then the exception is taken and the
* destination is not modified. If the SNaN exception enable bit is not
* set, setting the SNaN bit in the operand to a one converts the SNaN to
* a nonsignaling NaN. The operation then continues as described in the
* preceding paragraph for nonsignaling NaNs.
*/
if (aIsQNaN || aIsSNaN) { /* a is the destination operand */
return 0; /* return the destination operand */
} else {
return 1; /* return b */
}
}
#else #else
static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
flag aIsLargerSignificand) flag aIsLargerSignificand)