From e69ba2b489d9cc6e976a29a58726d45361d85b9d Mon Sep 17 00:00:00 2001 From: David Gibson Date: Mon, 19 Mar 2018 17:05:05 +1100 Subject: [PATCH] target/ppc: Initialize lazy_tlb_flush correctly ppc_tr_init_disas_context() correctly sets lazy_tlb_flush to true on certain CPU models. However, it leaves it uninitialized, instead of setting it to false on all others. It wasn't caught before now because we didn't have examples in the tests that exercised this path. However it can now be caught using clang's undefined behaviour sanitizer and the sam460ex board. Suggested-by: Peter Maydell Signed-off-by: David Gibson Reviewed-by: Thomas Huth Reviewed-by: Greg Kurz --- target/ppc/translate.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 218665b408..3457d29f8e 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7237,10 +7237,9 @@ static int ppc_tr_init_disas_context(DisasContextBase *dcbase, ctx->sf_mode = msr_is_64bit(env, env->msr); ctx->has_cfar = !!(env->flags & POWERPC_FLAG_CFAR); #endif - if (env->mmu_model == POWERPC_MMU_32B || - env->mmu_model == POWERPC_MMU_601 || - (env->mmu_model & POWERPC_MMU_64B)) - ctx->lazy_tlb_flush = true; + ctx->lazy_tlb_flush = env->mmu_model == POWERPC_MMU_32B + || env->mmu_model == POWERPC_MMU_601 + || (env->mmu_model & POWERPC_MMU_64B); ctx->fpu_enabled = !!msr_fp; if ((env->flags & POWERPC_FLAG_SPE) && msr_spe)