mirror of https://gitee.com/openkylin/qemu.git
target/ppc: Correct SDR1 masking
SDR_64_HTABORG, which indicates the bits of the SDR1 register to use for the base of a 64-bit machine's hashed page table (HPT) isn't correct. It includes the top 46 bits of the register, but in fact the top 4 bits must be zero (according to the ISA v2.07). No actual implementation has supported close to 2^60 bytes of physical address space, so it's kind of irrelevant, but we might as well correct this. In addition, although we checked for bad size values in SDR1, we never reported an error if entirely invalid bits were set there. Add this check to ppc_store_sdr1(). Reported-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -56,7 +56,7 @@ void ppc_hash64_update_rmls(CPUPPCState *env);
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* Hash page table definitions
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*/
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#define SDR_64_HTABORG 0xFFFFFFFFFFFC0000ULL
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#define SDR_64_HTABORG 0x0FFFFFFFFFFC0000ULL
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#define SDR_64_HTABSIZE 0x000000000000001FULL
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#define HPTES_PER_GROUP 8
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@ -2007,8 +2007,14 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value)
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assert(!cpu->vhyp);
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#if defined(TARGET_PPC64)
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if (env->mmu_model & POWERPC_MMU_64) {
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target_ulong sdr_mask = SDR_64_HTABORG | SDR_64_HTABSIZE;
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target_ulong htabsize = value & SDR_64_HTABSIZE;
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if (value & ~sdr_mask) {
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error_report("Invalid bits 0x"TARGET_FMT_lx" set in SDR1",
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value & ~sdr_mask);
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value &= sdr_mask;
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}
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if (htabsize > 28) {
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error_report("Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1",
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htabsize);
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