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target/i386: Convert to 3-phase reset 

Convert the i386 CPU class to use 3-phase reset, so it doesn't
need to use device_class_set_parent_reset() any more.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-id: 20221124115023.2437291-7-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2022-11-24 11:50:09 +00:00
parent ab85156d8a
commit e86787d33b
2 changed files with 10 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
target/i386/cpu-qom.h
View File

@ -42,7 +42,7 @@ typedef struct X86CPUModel X86CPUModel;
* @migration_safe: See CpuDefinitionInfo::migration_safe * @migration_safe: See CpuDefinitionInfo::migration_safe
* @static_model: See CpuDefinitionInfo::static * @static_model: See CpuDefinitionInfo::static
* @parent_realize: The parent class' realize handler. * @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler. * @parent_phases: The parent class' reset phase handlers.
* *
* An x86 CPU model or family. * An x86 CPU model or family.
*/ */
@ -67,7 +67,7 @@ struct X86CPUClass {
DeviceRealize parent_realize; DeviceRealize parent_realize;
DeviceUnrealize parent_unrealize; DeviceUnrealize parent_unrealize;
DeviceReset parent_reset; ResettablePhases parent_phases;
}; };

12
target/i386/cpu.c
View File

@ -5877,9 +5877,9 @@ static void x86_cpu_set_sgxlepubkeyhash(CPUX86State *env)
#endif #endif
} }
static void x86_cpu_reset(DeviceState *dev) static void x86_cpu_reset_hold(Object *obj)
{ {
CPUState *s = CPU(dev); CPUState *s = CPU(obj);
X86CPU *cpu = X86_CPU(s); X86CPU *cpu = X86_CPU(s);
X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);
CPUX86State *env = &cpu->env; CPUX86State *env = &cpu->env;
@ -5887,7 +5887,9 @@ static void x86_cpu_reset(DeviceState *dev)
uint64_t xcr0; uint64_t xcr0;
int i; int i;
xcc->parent_reset(dev); if (xcc->parent_phases.hold) {
xcc->parent_phases.hold(obj);
}
memset(env, 0, offsetof(CPUX86State, end_reset_fields)); memset(env, 0, offsetof(CPUX86State, end_reset_fields));
@ -7111,6 +7113,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
X86CPUClass *xcc = X86_CPU_CLASS(oc); X86CPUClass *xcc = X86_CPU_CLASS(oc);
CPUClass *cc = CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(oc);
DeviceClass *dc = DEVICE_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc);
ResettableClass *rc = RESETTABLE_CLASS(oc);
FeatureWord w; FeatureWord w;
device_class_set_parent_realize(dc, x86_cpu_realizefn, device_class_set_parent_realize(dc, x86_cpu_realizefn,
@ -7119,7 +7122,8 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
&xcc->parent_unrealize); &xcc->parent_unrealize);
device_class_set_props(dc, x86_cpu_properties); device_class_set_props(dc, x86_cpu_properties);
device_class_set_parent_reset(dc, x86_cpu_reset, &xcc->parent_reset); resettable_class_set_parent_phases(rc, NULL, x86_cpu_reset_hold, NULL,
&xcc->parent_phases);
cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP; cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP;
cc->class_by_name = x86_cpu_class_by_name; cc->class_by_name = x86_cpu_class_by_name;