mirror of https://gitee.com/openkylin/qemu.git
target-ppc: add cnttzd[.] instruction
Add ISA3.0 Count trailing zeros double word Signed-off-by: Sandipan Das <sandipandas1990@gmail.com> [ added ISA300 flag ] Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -44,6 +44,7 @@ DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
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DEF_HELPER_3(sraw, tl, env, tl, tl)
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#if defined(TARGET_PPC64)
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DEF_HELPER_FLAGS_1(cntlzd, TCG_CALL_NO_RWG_SE, tl, tl)
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DEF_HELPER_FLAGS_1(cnttzd, TCG_CALL_NO_RWG_SE, tl, tl)
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DEF_HELPER_FLAGS_1(popcntd, TCG_CALL_NO_RWG_SE, tl, tl)
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DEF_HELPER_FLAGS_2(bpermd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
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DEF_HELPER_3(srad, tl, env, tl, tl)
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@ -150,6 +150,11 @@ target_ulong helper_cntlzd(target_ulong t)
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{
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return clz64(t);
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}
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target_ulong helper_cnttzd(target_ulong t)
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{
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return ctz64(t);
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}
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#endif
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#if defined(TARGET_PPC64)
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@ -1823,6 +1823,15 @@ static void gen_cntlzd(DisasContext *ctx)
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if (unlikely(Rc(ctx->opcode) != 0))
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gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]);
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}
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/* cnttzd */
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static void gen_cnttzd(DisasContext *ctx)
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{
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gen_helper_cnttzd(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
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if (unlikely(Rc(ctx->opcode) != 0)) {
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gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]);
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}
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}
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#endif
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/*** Integer rotate ***/
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@ -10060,6 +10069,7 @@ GEN_HANDLER_E(prtyw, 0x1F, 0x1A, 0x04, 0x0000F801, PPC_NONE, PPC2_ISA205),
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#if defined(TARGET_PPC64)
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GEN_HANDLER(popcntd, 0x1F, 0x1A, 0x0F, 0x0000F801, PPC_POPCNTWD),
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GEN_HANDLER(cntlzd, 0x1F, 0x1A, 0x01, 0x00000000, PPC_64B),
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GEN_HANDLER_E(cnttzd, 0x1F, 0x1A, 0x11, 0x00000000, PPC_NONE, PPC2_ISA300),
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GEN_HANDLER_E(prtyd, 0x1F, 0x1A, 0x05, 0x0000F801, PPC_NONE, PPC2_ISA205),
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GEN_HANDLER_E(bpermd, 0x1F, 0x1C, 0x07, 0x00000001, PPC_NONE, PPC2_PERM_ISA206),
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#endif
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