mirror of https://gitee.com/openkylin/qemu.git
ahci: Do not ignore memory access read size
The only guidance the AHCI specification gives on memory access is: "Register accesses shall have a maximum size of 64-bits; 64-bit access must not cross an 8-byte alignment boundary." I interpret this to mean that aligned or unaligned 1, 2 and 4 byte accesses should work, as well as aligned 8 byte accesses. In practice, a real Q35/ICH9 responds to 1, 2, 4 and 8 byte reads regardless of alignment. Windows 7 can be observed making 1 byte reads to the middle of 32 bit registers to fetch error codes. Introduce a wrapper to support unaligned accesses to AHCI. This wrapper will support aligned 8 byte reads, but will make no effort to support unaligned 8 byte reads, which although they will work on real hardware, are not guaranteed to work and do not appear to be used by either Windows or Linux. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1434470575-21625-2-git-send-email-jsnow@redhat.com
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@ -331,8 +331,7 @@ static void ahci_port_write(AHCIState *s, int port, int offset, uint32_t val)
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}
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}
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static uint64_t ahci_mem_read(void *opaque, hwaddr addr,
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unsigned size)
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static uint64_t ahci_mem_read_32(void *opaque, hwaddr addr)
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{
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AHCIState *s = opaque;
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uint32_t val = 0;
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@ -368,6 +367,30 @@ static uint64_t ahci_mem_read(void *opaque, hwaddr addr,
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}
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/**
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* AHCI 1.3 section 3 ("HBA Memory Registers")
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* Support unaligned 8/16/32 bit reads, and 64 bit aligned reads.
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* Caller is responsible for masking unwanted higher order bytes.
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*/
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static uint64_t ahci_mem_read(void *opaque, hwaddr addr, unsigned size)
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{
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hwaddr aligned = addr & ~0x3;
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int ofst = addr - aligned;
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uint64_t lo = ahci_mem_read_32(opaque, aligned);
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uint64_t hi;
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/* if < 8 byte read does not cross 4 byte boundary */
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if (ofst + size <= 4) {
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return lo >> (ofst * 8);
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}
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g_assert_cmpint(size, >, 1);
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/* If the 64bit read is unaligned, we will produce undefined
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* results. AHCI does not support unaligned 64bit reads. */
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hi = ahci_mem_read_32(opaque, aligned + 4);
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return (hi << 32 | lo) >> (ofst * 8);
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}
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static void ahci_mem_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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