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target/microblaze: Remove helper_debug and env->debug 

This is not used, and seems redundant with -d cpu.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2020-08-24 06:46:04 -07:00
parent 41060b74bf
commit eb2022b7d0
4 changed files with 2 additions and 39 deletions
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1
target/microblaze/cpu.h
View File

@ -229,7 +229,6 @@ typedef struct CPUMBState CPUMBState;
#define STREAM_NONBLOCK (1 << 4)
struct CPUMBState {
uint32_t debug;
uint32_t btaken;
uint32_t btarget;
uint32_t bimm;

1
target/microblaze/helper.h
View File

@ -1,5 +1,4 @@
DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32)
DEF_HELPER_1(debug, void, env)
DEF_HELPER_FLAGS_3(carry, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
DEF_HELPER_2(cmp, i32, i32, i32)
DEF_HELPER_2(cmpu, i32, i32, i32)

23
target/microblaze/op_helper.c
View File

@ -71,29 +71,6 @@ void helper_raise_exception(CPUMBState *env, uint32_t index)
cpu_loop_exit(cs);
}
void helper_debug(CPUMBState *env)
{
int i;
qemu_log("PC=%08x\n", env->pc);
qemu_log("rmsr=%x resr=%x rear=%" PRIx64 " "
"debug[%x] imm=%x iflags=%x\n",
env->msr, env->esr, env->ear,
env->debug, env->imm, env->iflags);
qemu_log("btaken=%d btarget=%x mode=%s(saved=%s) eip=%d ie=%d\n",
env->btaken, env->btarget,
(env->msr & MSR_UM) ? "user" : "kernel",
(env->msr & MSR_UMS) ? "user" : "kernel",
(bool)(env->msr & MSR_EIP),
(bool)(env->msr & MSR_IE));
for (i = 0; i < 32; i++) {
qemu_log("r%2.2d=%8.8x ", i, env->regs[i]);
if ((i + 1) % 4 == 0)
qemu_log("\n");
}
qemu_log("\n\n");
}
static inline uint32_t compute_carry(uint32_t a, uint32_t b, uint32_t cin)
{
uint32_t cout = 0;

16
target/microblaze/translate.c
View File

@ -53,7 +53,6 @@
#define DISAS_UPDATE DISAS_TARGET_1 /* cpu state was modified dynamically */
#define DISAS_TB_JUMP DISAS_TARGET_2 /* only pc was modified statically */
static TCGv_i32 env_debug;
static TCGv_i32 cpu_R[32];
static TCGv_i32 cpu_pc;
static TCGv_i32 cpu_msr;
@ -1675,13 +1674,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
tcg_gen_insn_start(dc->pc);
num_insns++;
#if SIM_COMPAT
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
tcg_gen_movi_i32(cpu_pc, dc->pc);
gen_helper_debug();
}
#endif
if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
gen_raise_exception_sync(dc, EXCP_DEBUG);
/* The address covered by the breakpoint must be included in
@ -1824,10 +1816,9 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags)
qemu_fprintf(f, "IN: PC=%x %s\n",
env->pc, lookup_symbol(env->pc));
qemu_fprintf(f, "rmsr=%x resr=%x rear=%" PRIx64 " "
"debug=%x imm=%x iflags=%x fsr=%x rbtr=%x\n",
"imm=%x iflags=%x fsr=%x rbtr=%x\n",
env->msr, env->esr, env->ear,
env->debug, env->imm, env->iflags, env->fsr,
env->btr);
env->imm, env->iflags, env->fsr, env->btr);
qemu_fprintf(f, "btaken=%d btarget=%x mode=%s(saved=%s) eip=%d ie=%d\n",
env->btaken, env->btarget,
(env->msr & MSR_UM) ? "user" : "kernel",
@ -1857,9 +1848,6 @@ void mb_tcg_init(void)
{
int i;
env_debug = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUMBState, debug),
"debug0");
env_iflags = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUMBState, iflags),
"iflags");