mirror of https://gitee.com/openkylin/qemu.git
lsi53c895a: remove pointless cast from void *
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
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6597ebbbfa
commit
eb40f9845b
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@ -635,7 +635,7 @@ static int lsi_queue_tag(LSIState *s, uint32_t tag, uint32_t arg)
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static void lsi_command_complete(void *opaque, int reason, uint32_t tag,
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uint32_t arg)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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int out;
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out = (s->sstat1 & PHASE_MASK) == PHASE_DO;
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@ -1724,14 +1724,14 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
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static void lsi_mmio_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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lsi_reg_writeb(s, addr & 0xff, val);
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}
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static void lsi_mmio_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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addr &= 0xff;
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lsi_reg_writeb(s, addr, val & 0xff);
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@ -1740,7 +1740,7 @@ static void lsi_mmio_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void lsi_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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addr &= 0xff;
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lsi_reg_writeb(s, addr, val & 0xff);
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@ -1751,14 +1751,14 @@ static void lsi_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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static uint32_t lsi_mmio_readb(void *opaque, target_phys_addr_t addr)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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return lsi_reg_readb(s, addr & 0xff);
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}
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static uint32_t lsi_mmio_readw(void *opaque, target_phys_addr_t addr)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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uint32_t val;
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addr &= 0xff;
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@ -1769,7 +1769,7 @@ static uint32_t lsi_mmio_readw(void *opaque, target_phys_addr_t addr)
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static uint32_t lsi_mmio_readl(void *opaque, target_phys_addr_t addr)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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uint32_t val;
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addr &= 0xff;
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val = lsi_reg_readb(s, addr);
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@ -1793,7 +1793,7 @@ static CPUWriteMemoryFunc * const lsi_mmio_writefn[3] = {
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static void lsi_ram_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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uint32_t newval;
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int shift;
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@ -1807,7 +1807,7 @@ static void lsi_ram_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void lsi_ram_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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uint32_t newval;
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addr &= 0x1fff;
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@ -1823,7 +1823,7 @@ static void lsi_ram_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void lsi_ram_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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addr &= 0x1fff;
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s->script_ram[addr >> 2] = val;
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@ -1831,7 +1831,7 @@ static void lsi_ram_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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static uint32_t lsi_ram_readb(void *opaque, target_phys_addr_t addr)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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uint32_t val;
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addr &= 0x1fff;
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@ -1842,7 +1842,7 @@ static uint32_t lsi_ram_readb(void *opaque, target_phys_addr_t addr)
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static uint32_t lsi_ram_readw(void *opaque, target_phys_addr_t addr)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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uint32_t val;
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addr &= 0x1fff;
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@ -1854,7 +1854,7 @@ static uint32_t lsi_ram_readw(void *opaque, target_phys_addr_t addr)
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static uint32_t lsi_ram_readl(void *opaque, target_phys_addr_t addr)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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addr &= 0x1fff;
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return le32_to_cpu(s->script_ram[addr >> 2]);
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@ -1874,13 +1874,13 @@ static CPUWriteMemoryFunc * const lsi_ram_writefn[3] = {
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static uint32_t lsi_io_readb(void *opaque, uint32_t addr)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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return lsi_reg_readb(s, addr & 0xff);
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}
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static uint32_t lsi_io_readw(void *opaque, uint32_t addr)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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uint32_t val;
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addr &= 0xff;
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val = lsi_reg_readb(s, addr);
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@ -1890,7 +1890,7 @@ static uint32_t lsi_io_readw(void *opaque, uint32_t addr)
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static uint32_t lsi_io_readl(void *opaque, uint32_t addr)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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uint32_t val;
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addr &= 0xff;
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val = lsi_reg_readb(s, addr);
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@ -1902,13 +1902,13 @@ static uint32_t lsi_io_readl(void *opaque, uint32_t addr)
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static void lsi_io_writeb(void *opaque, uint32_t addr, uint32_t val)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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lsi_reg_writeb(s, addr & 0xff, val);
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}
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static void lsi_io_writew(void *opaque, uint32_t addr, uint32_t val)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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addr &= 0xff;
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lsi_reg_writeb(s, addr, val & 0xff);
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lsi_reg_writeb(s, addr + 1, (val >> 8) & 0xff);
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@ -1916,7 +1916,7 @@ static void lsi_io_writew(void *opaque, uint32_t addr, uint32_t val)
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static void lsi_io_writel(void *opaque, uint32_t addr, uint32_t val)
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{
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LSIState *s = (LSIState *)opaque;
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LSIState *s = opaque;
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addr &= 0xff;
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lsi_reg_writeb(s, addr, val & 0xff);
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lsi_reg_writeb(s, addr + 1, (val >> 8) & 0xff);
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