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Merge remote-tracking branch 'remotes/vivier/tags/m68k-part2-pull-request' into staging

# gpg: Signature made Fri 28 Oct 2016 09:44:23 BST
# gpg:                using RSA key 0xF30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>"
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>"
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-part2-pull-request:
  MAINTAINERS: update M68K entry
  target-m68k: immediate ops manage word and byte operands
  target-m68k: cmp manages word and bytes operands
  target-m68k: add/sub manage word and byte operands
  target-m68k: add addressing modes to neg
  target-m68k: introduce byte and word cc_ops
  target-m68k: some bit ops cleanup
  target-m68k: suba/adda can manage word operand
  target-m68k: and can manage word and byte operands
  target-m68k: or can manage word and byte operands
  target-m68k: eor can manage word and byte operands
  target-m68k: add addressing modes to not
  target-m68k: Inline addx, subx, negx
  target-m68k: add dbcc
  target-m68k: add addressing modes to scc
  target-m68k: add exg ops
  target-m68k: add linkl
  target-m68k: add bkpt instruction

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2016-10-28 17:22:57 +01:00
commit eb540e2cc3
5 changed files with 509 additions and 250 deletions

View File

@ -133,7 +133,8 @@ F: include/hw/lm32/
F: tests/tcg/lm32/
M68K
S: Orphan
M: Laurent Vivier <laurent@vivier.eu>
S: Maintained
F: target-m68k/
F: hw/m68k/

View File

@ -179,11 +179,11 @@ typedef enum {
CC_OP_FLAGS,
/* X in cc_x, C = X, N in cc_n, Z in cc_n, V via cc_n/cc_v. */
CC_OP_ADD,
CC_OP_SUB,
CC_OP_ADDB, CC_OP_ADDW, CC_OP_ADDL,
CC_OP_SUBB, CC_OP_SUBW, CC_OP_SUBL,
/* X in cc_x, {N,Z,C,V} via cc_n/cc_v. */
CC_OP_CMP,
CC_OP_CMPB, CC_OP_CMPW, CC_OP_CMPL,
/* X in cc_x, C = 0, V = 0, N in cc_n, Z in cc_n. */
CC_OP_LOGIC,

View File

@ -277,46 +277,6 @@ uint32_t HELPER(sats)(uint32_t val, uint32_t v)
return val;
}
uint32_t HELPER(subx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2)
{
uint32_t res, new_x;
if (env->cc_x) {
new_x = (op1 <= op2);
res = op1 - (op2 + 1);
} else {
new_x = (op1 < op2);
res = op1 - op2;
}
env->cc_x = new_x;
env->cc_c = new_x;
env->cc_n = res;
env->cc_z |= res; /* !Z is sticky */
env->cc_v = (res ^ op1) & (op1 ^ op2);
return res;
}
uint32_t HELPER(addx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2)
{
uint32_t res, new_x;
if (env->cc_x) {
res = op1 + op2 + 1;
new_x = (res <= op2);
} else {
res = op1 + op2;
new_x = (res < op2);
}
env->cc_x = new_x;
env->cc_c = new_x;
env->cc_n = res;
env->cc_z |= res; /* !Z is sticky. */
env->cc_v = (res ^ op1) & ~(op1 ^ op2);
return res;
}
void HELPER(set_sr)(CPUM68KState *env, uint32_t val)
{
env->sr = val & 0xffe0;
@ -624,32 +584,41 @@ void HELPER(mac_set_flags)(CPUM68KState *env, uint32_t acc)
}
}
#define EXTSIGN(val, index) ( \
(index == 0) ? (int8_t)(val) : ((index == 1) ? (int16_t)(val) : (val)) \
)
#define COMPUTE_CCR(op, x, n, z, v, c) { \
switch (op) { \
case CC_OP_FLAGS: \
/* Everything in place. */ \
break; \
case CC_OP_ADD: \
case CC_OP_ADDB: \
case CC_OP_ADDW: \
case CC_OP_ADDL: \
res = n; \
src2 = v; \
src1 = res - src2; \
src1 = EXTSIGN(res - src2, op - CC_OP_ADDB); \
c = x; \
z = n; \
v = (res ^ src1) & ~(src1 ^ src2); \
break; \
case CC_OP_SUB: \
case CC_OP_SUBB: \
case CC_OP_SUBW: \
case CC_OP_SUBL: \
res = n; \
src2 = v; \
src1 = res + src2; \
src1 = EXTSIGN(res + src2, op - CC_OP_SUBB); \
c = x; \
z = n; \
v = (res ^ src1) & (src1 ^ src2); \
break; \
case CC_OP_CMP: \
case CC_OP_CMPB: \
case CC_OP_CMPW: \
case CC_OP_CMPL: \
src1 = n; \
src2 = v; \
res = src1 - src2; \
res = EXTSIGN(src1 - src2, op - CC_OP_CMPB); \
n = res; \
z = res; \
c = src1 < src2; \
@ -670,16 +639,16 @@ uint32_t cpu_m68k_get_ccr(CPUM68KState *env)
uint32_t res, src1, src2;
x = env->cc_x;
c = env->cc_c;
n = env->cc_n;
z = env->cc_z;
v = env->cc_v;
c = env->cc_c;
COMPUTE_CCR(env->cc_op, x, n, z, v, c);
n = n >> 31;
v = v >> 31;
z = (z == 0);
v = v >> 31;
return x * CCF_X + n * CCF_N + z * CCF_Z + v * CCF_V + c * CCF_C;
}

View File

@ -3,8 +3,6 @@ DEF_HELPER_1(ff1, i32, i32)
DEF_HELPER_FLAGS_2(sats, TCG_CALL_NO_RWG_SE, i32, i32, i32)
DEF_HELPER_2(divu, void, env, i32)
DEF_HELPER_2(divs, void, env, i32)
DEF_HELPER_3(addx_cc, i32, env, i32, i32)
DEF_HELPER_3(subx_cc, i32, env, i32, i32)
DEF_HELPER_3(shl_cc, i32, env, i32, i32)
DEF_HELPER_3(shr_cc, i32, env, i32, i32)
DEF_HELPER_3(sar_cc, i32, env, i32, i32)

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