mirror of https://gitee.com/openkylin/qemu.git
target-arm: Add the Cortex-R5F
Add the Cortex-R5F with the optional FPU enabled. Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20180529124707.3025-2-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1361,6 +1361,14 @@ static void cortex_r5_initfn(Object *obj)
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define_arm_cp_regs(cpu, cortexr5_cp_reginfo);
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}
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static void cortex_r5f_initfn(Object *obj)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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cortex_r5_initfn(obj);
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set_feature(&cpu->env, ARM_FEATURE_VFP3);
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}
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static const ARMCPRegInfo cortexa8_cp_reginfo[] = {
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{ .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0,
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.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
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@ -1821,6 +1829,7 @@ static const ARMCPUInfo arm_cpus[] = {
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{ .name = "cortex-m33", .initfn = cortex_m33_initfn,
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.class_init = arm_v7m_class_init },
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{ .name = "cortex-r5", .initfn = cortex_r5_initfn },
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{ .name = "cortex-r5f", .initfn = cortex_r5f_initfn },
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{ .name = "cortex-a7", .initfn = cortex_a7_initfn },
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{ .name = "cortex-a8", .initfn = cortex_a8_initfn },
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{ .name = "cortex-a9", .initfn = cortex_a9_initfn },
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