mirror of https://gitee.com/openkylin/qemu.git
PPC: e500: Define addresses as always 64bit
Every time we use an address constant, it needs to potentially fit into a 64bit physical address space. So let's define things accordingly. Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
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ebb9518aab
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@ -42,17 +42,17 @@
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#define RAM_SIZES_ALIGN (64UL << 20)
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#define RAM_SIZES_ALIGN (64UL << 20)
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#define MPC8544_CCSRBAR_BASE 0xE0000000
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#define MPC8544_CCSRBAR_BASE 0xE0000000ULL
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#define MPC8544_CCSRBAR_SIZE 0x00100000
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#define MPC8544_CCSRBAR_SIZE 0x00100000ULL
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#define MPC8544_MPIC_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x40000)
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#define MPC8544_MPIC_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x40000ULL)
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#define MPC8544_SERIAL0_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4500)
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#define MPC8544_SERIAL0_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4500ULL)
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#define MPC8544_SERIAL1_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4600)
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#define MPC8544_SERIAL1_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4600ULL)
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#define MPC8544_PCI_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x8000)
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#define MPC8544_PCI_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x8000ULL)
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#define MPC8544_PCI_REGS_SIZE 0x1000
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#define MPC8544_PCI_REGS_SIZE 0x1000ULL
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#define MPC8544_PCI_IO 0xE1000000
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#define MPC8544_PCI_IO 0xE1000000ULL
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#define MPC8544_PCI_IOLEN 0x10000
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#define MPC8544_PCI_IOLEN 0x10000ULL
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#define MPC8544_UTIL_BASE (MPC8544_CCSRBAR_BASE + 0xe0000)
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#define MPC8544_UTIL_BASE (MPC8544_CCSRBAR_BASE + 0xe0000ULL)
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#define MPC8544_SPIN_BASE 0xEF000000
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#define MPC8544_SPIN_BASE 0xEF000000ULL
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struct boot_info
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struct boot_info
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{
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{
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@ -232,7 +232,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
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qemu_devtree_add_subnode(fdt, "/aliases");
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qemu_devtree_add_subnode(fdt, "/aliases");
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/* XXX These should go into their respective devices' code */
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/* XXX These should go into their respective devices' code */
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snprintf(soc, sizeof(soc), "/soc@%x", MPC8544_CCSRBAR_BASE);
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snprintf(soc, sizeof(soc), "/soc@%llx", MPC8544_CCSRBAR_BASE);
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qemu_devtree_add_subnode(fdt, soc);
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qemu_devtree_add_subnode(fdt, soc);
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qemu_devtree_setprop_string(fdt, soc, "device_type", "soc");
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qemu_devtree_setprop_string(fdt, soc, "device_type", "soc");
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qemu_devtree_setprop(fdt, soc, "compatible", compatible_sb,
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qemu_devtree_setprop(fdt, soc, "compatible", compatible_sb,
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@ -244,7 +244,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
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/* XXX should contain a reasonable value */
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/* XXX should contain a reasonable value */
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qemu_devtree_setprop_cell(fdt, soc, "bus-frequency", 0);
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qemu_devtree_setprop_cell(fdt, soc, "bus-frequency", 0);
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snprintf(mpic, sizeof(mpic), "%s/pic@%x", soc,
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snprintf(mpic, sizeof(mpic), "%s/pic@%llx", soc,
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MPC8544_MPIC_REGS_BASE - MPC8544_CCSRBAR_BASE);
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MPC8544_MPIC_REGS_BASE - MPC8544_CCSRBAR_BASE);
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qemu_devtree_add_subnode(fdt, mpic);
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qemu_devtree_add_subnode(fdt, mpic);
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qemu_devtree_setprop_string(fdt, mpic, "device_type", "open-pic");
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qemu_devtree_setprop_string(fdt, mpic, "device_type", "open-pic");
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@ -266,7 +266,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
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* device it finds in the dt as serial output device. And we generate
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* device it finds in the dt as serial output device. And we generate
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* devices in reverse order to the dt.
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* devices in reverse order to the dt.
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*/
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*/
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snprintf(ser1, sizeof(ser1), "%s/serial@%x", soc,
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snprintf(ser1, sizeof(ser1), "%s/serial@%llx", soc,
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MPC8544_SERIAL1_REGS_BASE - MPC8544_CCSRBAR_BASE);
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MPC8544_SERIAL1_REGS_BASE - MPC8544_CCSRBAR_BASE);
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qemu_devtree_add_subnode(fdt, ser1);
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qemu_devtree_add_subnode(fdt, ser1);
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qemu_devtree_setprop_string(fdt, ser1, "device_type", "serial");
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qemu_devtree_setprop_string(fdt, ser1, "device_type", "serial");
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@ -279,7 +279,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
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qemu_devtree_setprop_phandle(fdt, ser1, "interrupt-parent", mpic);
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qemu_devtree_setprop_phandle(fdt, ser1, "interrupt-parent", mpic);
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qemu_devtree_setprop_string(fdt, "/aliases", "serial1", ser1);
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qemu_devtree_setprop_string(fdt, "/aliases", "serial1", ser1);
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snprintf(ser0, sizeof(ser0), "%s/serial@%x", soc,
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snprintf(ser0, sizeof(ser0), "%s/serial@%llx", soc,
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MPC8544_SERIAL0_REGS_BASE - MPC8544_CCSRBAR_BASE);
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MPC8544_SERIAL0_REGS_BASE - MPC8544_CCSRBAR_BASE);
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qemu_devtree_add_subnode(fdt, ser0);
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qemu_devtree_add_subnode(fdt, ser0);
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qemu_devtree_setprop_string(fdt, ser0, "device_type", "serial");
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qemu_devtree_setprop_string(fdt, ser0, "device_type", "serial");
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@ -293,7 +293,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
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qemu_devtree_setprop_string(fdt, "/aliases", "serial0", ser0);
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qemu_devtree_setprop_string(fdt, "/aliases", "serial0", ser0);
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qemu_devtree_setprop_string(fdt, "/chosen", "linux,stdout-path", ser0);
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qemu_devtree_setprop_string(fdt, "/chosen", "linux,stdout-path", ser0);
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snprintf(gutil, sizeof(gutil), "%s/global-utilities@%x", soc,
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snprintf(gutil, sizeof(gutil), "%s/global-utilities@%llx", soc,
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MPC8544_UTIL_BASE - MPC8544_CCSRBAR_BASE);
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MPC8544_UTIL_BASE - MPC8544_CCSRBAR_BASE);
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qemu_devtree_add_subnode(fdt, gutil);
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qemu_devtree_add_subnode(fdt, gutil);
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qemu_devtree_setprop_string(fdt, gutil, "compatible", "fsl,mpc8544-guts");
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qemu_devtree_setprop_string(fdt, gutil, "compatible", "fsl,mpc8544-guts");
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@ -301,7 +301,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
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MPC8544_CCSRBAR_BASE, 0x1000);
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MPC8544_CCSRBAR_BASE, 0x1000);
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qemu_devtree_setprop(fdt, gutil, "fsl,has-rstcr", NULL, 0);
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qemu_devtree_setprop(fdt, gutil, "fsl,has-rstcr", NULL, 0);
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snprintf(pci, sizeof(pci), "/pci@%x", MPC8544_PCI_REGS_BASE);
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snprintf(pci, sizeof(pci), "/pci@%llx", MPC8544_PCI_REGS_BASE);
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qemu_devtree_add_subnode(fdt, pci);
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qemu_devtree_add_subnode(fdt, pci);
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qemu_devtree_setprop_cell(fdt, pci, "cell-index", 0);
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qemu_devtree_setprop_cell(fdt, pci, "cell-index", 0);
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qemu_devtree_setprop_string(fdt, pci, "compatible", "fsl,mpc8540-pci");
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qemu_devtree_setprop_string(fdt, pci, "compatible", "fsl,mpc8540-pci");
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