mirror of https://gitee.com/openkylin/qemu.git
ppc/xics: move the cpu_setup() handler under the ICPState class
The cpu_setup() handler is currently under the XICSState class but it really belongs under ICPState as it is setting up an individual vCPU. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -66,15 +66,15 @@ void xics_cpu_setup(XICSState *xics, PowerPCCPU *cpu)
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CPUState *cs = CPU(cpu);
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CPUState *cs = CPU(cpu);
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CPUPPCState *env = &cpu->env;
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CPUPPCState *env = &cpu->env;
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ICPState *ss = &xics->ss[cs->cpu_index];
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ICPState *ss = &xics->ss[cs->cpu_index];
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XICSStateClass *info;
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ICPStateClass *icpc;
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assert(cs->cpu_index < xics->nr_servers);
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assert(cs->cpu_index < xics->nr_servers);
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ss->cs = cs;
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ss->cs = cs;
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info = XICS_COMMON_GET_CLASS(xics);
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icpc = ICP_GET_CLASS(ss);
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if (info->cpu_setup) {
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if (icpc->cpu_setup) {
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info->cpu_setup(ss, cpu);
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icpc->cpu_setup(ss, cpu);
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}
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}
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switch (PPC_INPUT(env)) {
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switch (PPC_INPUT(env)) {
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@ -124,6 +124,34 @@ static void icp_kvm_reset(DeviceState *dev)
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icp_set_kvm_state(icp, 1);
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icp_set_kvm_state(icp, 1);
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}
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}
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static void icp_kvm_cpu_setup(ICPState *ss, PowerPCCPU *cpu)
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{
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CPUState *cs = CPU(cpu);
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int ret;
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if (kernel_xics_fd == -1) {
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abort();
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}
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/*
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* If we are reusing a parked vCPU fd corresponding to the CPU
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* which was hot-removed earlier we don't have to renable
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* KVM_CAP_IRQ_XICS capability again.
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*/
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if (ss->cap_irq_xics_enabled) {
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return;
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}
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ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd,
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kvm_arch_vcpu_id(cs));
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if (ret < 0) {
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error_report("Unable to connect CPU%ld to kernel XICS: %s",
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kvm_arch_vcpu_id(cs), strerror(errno));
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exit(1);
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}
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ss->cap_irq_xics_enabled = true;
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}
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static void icp_kvm_class_init(ObjectClass *klass, void *data)
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static void icp_kvm_class_init(ObjectClass *klass, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -132,6 +160,7 @@ static void icp_kvm_class_init(ObjectClass *klass, void *data)
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dc->reset = icp_kvm_reset;
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dc->reset = icp_kvm_reset;
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icpc->pre_save = icp_get_kvm_state;
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icpc->pre_save = icp_get_kvm_state;
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icpc->post_load = icp_set_kvm_state;
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icpc->post_load = icp_set_kvm_state;
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icpc->cpu_setup = icp_kvm_cpu_setup;
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}
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}
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static const TypeInfo icp_kvm_info = {
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static const TypeInfo icp_kvm_info = {
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@ -324,33 +353,6 @@ static const TypeInfo ics_kvm_info = {
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/*
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/*
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* XICS-KVM
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* XICS-KVM
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*/
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*/
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static void xics_kvm_cpu_setup(ICPState *ss, PowerPCCPU *cpu)
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{
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CPUState *cs = CPU(cpu);
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int ret;
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if (kernel_xics_fd == -1) {
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abort();
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}
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/*
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* If we are reusing a parked vCPU fd corresponding to the CPU
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* which was hot-removed earlier we don't have to renable
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* KVM_CAP_IRQ_XICS capability again.
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*/
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if (ss->cap_irq_xics_enabled) {
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return;
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}
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ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd,
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kvm_arch_vcpu_id(cs));
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if (ret < 0) {
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error_report("Unable to connect CPU%ld to kernel XICS: %s",
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kvm_arch_vcpu_id(cs), strerror(errno));
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exit(1);
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}
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ss->cap_irq_xics_enabled = true;
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}
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static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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uint32_t token,
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uint32_t token,
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@ -429,10 +431,8 @@ fail:
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static void xics_kvm_class_init(ObjectClass *oc, void *data)
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static void xics_kvm_class_init(ObjectClass *oc, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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XICSStateClass *xsc = XICS_COMMON_CLASS(oc);
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dc->realize = xics_kvm_realize;
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dc->realize = xics_kvm_realize;
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xsc->cpu_setup = xics_kvm_cpu_setup;
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}
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}
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static const TypeInfo xics_spapr_kvm_info = {
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static const TypeInfo xics_spapr_kvm_info = {
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@ -73,8 +73,6 @@ typedef struct XICSFabric XICSFabric;
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struct XICSStateClass {
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struct XICSStateClass {
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DeviceClass parent_class;
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DeviceClass parent_class;
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void (*cpu_setup)(ICPState *icp, PowerPCCPU *cpu);
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};
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};
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struct XICSState {
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struct XICSState {
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@ -101,6 +99,7 @@ struct ICPStateClass {
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void (*pre_save)(ICPState *s);
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void (*pre_save)(ICPState *s);
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int (*post_load)(ICPState *s, int version_id);
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int (*post_load)(ICPState *s, int version_id);
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void (*cpu_setup)(ICPState *icp, PowerPCCPU *cpu);
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};
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};
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struct ICPState {
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struct ICPState {
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