mirror of https://gitee.com/openkylin/qemu.git
pci: shorten pci_host_{conf, data}_register_xxx function a bit.
pci_host_data_register_io_memory and its variants are too long a bit. So shorten them. Now they are pci_host_{conf, data}_register_{mmio, mmio_noswap, ioport}() Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
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8d6514f8dd
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f08b32fe95
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@ -236,10 +236,10 @@ static int pci_pbm_init_device(SysBusDevice *dev)
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pci_apb_iowrite, s);
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sysbus_init_mmio(dev, 0x10000ULL, pci_ioport);
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/* mem_config */
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pci_mem_config = pci_host_config_register_io_memory(&s->host_state);
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pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
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sysbus_init_mmio(dev, 0x10ULL, pci_mem_config);
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/* mem_data */
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pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
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pci_mem_data = pci_host_data_register_mmio(&s->host_state);
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sysbus_init_mmio(dev, 0x10000000ULL, pci_mem_data);
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return 0;
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}
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@ -108,8 +108,8 @@ static int pci_grackle_init_device(SysBusDevice *dev)
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s = FROM_SYSBUS(GrackleState, dev);
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pci_mem_config = pci_host_config_register_io_memory(&s->host_state);
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pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
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pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
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pci_mem_data = pci_host_data_register_mmio(&s->host_state);
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sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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@ -126,8 +126,8 @@ static int pci_dec_21154_init_device(SysBusDevice *dev)
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s = FROM_SYSBUS(GrackleState, dev);
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pci_mem_config = pci_host_config_register_io_memory(&s->host_state);
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pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
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pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
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pci_mem_data = pci_host_data_register_mmio(&s->host_state);
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sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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return 0;
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@ -116,7 +116,7 @@ static CPUReadMemoryFunc * const pci_host_config_read[] = {
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&pci_host_config_readl,
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};
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int pci_host_config_register_io_memory(PCIHostState *s)
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int pci_host_conf_register_mmio(PCIHostState *s)
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{
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return cpu_register_io_memory(pci_host_config_read,
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pci_host_config_write, s);
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@ -156,7 +156,7 @@ static CPUReadMemoryFunc * const pci_host_config_read_noswap[] = {
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&pci_host_config_readl_noswap,
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};
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int pci_host_config_register_io_memory_noswap(PCIHostState *s)
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int pci_host_conf_register_mmio_noswap(PCIHostState *s)
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{
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return cpu_register_io_memory(pci_host_config_read_noswap,
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pci_host_config_write_noswap, s);
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@ -180,7 +180,7 @@ static uint32_t pci_host_config_readl_ioport(void *opaque, uint32_t addr)
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return val;
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}
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void pci_host_config_register_ioport(pio_addr_t ioport, PCIHostState *s)
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void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s)
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{
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register_ioport_write(ioport, 4, 4, pci_host_config_writel_ioport, s);
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register_ioport_read(ioport, 4, 4, pci_host_config_readl_ioport, s);
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@ -203,7 +203,7 @@ static CPUReadMemoryFunc * const pci_host_data_read_mmio[] = {
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pci_host_data_readl_mmio,
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};
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int pci_host_data_register_io_memory(PCIHostState *s)
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int pci_host_data_register_mmio(PCIHostState *s)
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{
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return cpu_register_io_memory(pci_host_data_read_mmio,
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pci_host_data_write_mmio,
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@ -40,12 +40,12 @@ void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len);
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uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len);
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/* for mmio */
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int pci_host_config_register_io_memory(PCIHostState *s);
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int pci_host_config_register_io_memory_noswap(PCIHostState *s);
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int pci_host_data_register_io_memory(PCIHostState *s);
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int pci_host_conf_register_mmio(PCIHostState *s);
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int pci_host_conf_register_mmio_noswap(PCIHostState *s);
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int pci_host_data_register_mmio(PCIHostState *s);
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/* for ioio */
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void pci_host_config_register_ioport(pio_addr_t ioport, PCIHostState *s);
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void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s);
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void pci_host_data_register_ioport(pio_addr_t ioport, PCIHostState *s);
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#endif /* PCI_HOST_H */
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@ -180,7 +180,7 @@ static int i440fx_pcihost_initfn(SysBusDevice *dev)
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{
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I440FXState *s = FROM_SYSBUS(I440FXState, dev);
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pci_host_config_register_ioport(0xcf8, s);
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pci_host_conf_register_ioport(0xcf8, s);
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pci_host_data_register_ioport(0xcfc, s);
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return 0;
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@ -378,7 +378,7 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
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cpu_register_physical_memory(config_space + PCIC0_CFGADDR, 4, index);
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/* CFGDATA */
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index = pci_host_data_register_io_memory(&controller->pci_state);
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index = pci_host_data_register_mmio(&controller->pci_state);
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if (index < 0)
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goto free;
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cpu_register_physical_memory(config_space + PCIC0_CFGDATA, 4, index);
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@ -293,13 +293,13 @@ PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers)
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controller->pci_dev = d;
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/* CFGADDR */
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index = pci_host_config_register_io_memory_noswap(&controller->pci_state);
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index = pci_host_conf_register_mmio_noswap(&controller->pci_state);
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if (index < 0)
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goto free;
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cpu_register_physical_memory(registers + PCIE500_CFGADDR, 4, index);
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/* CFGDATA */
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index = pci_host_data_register_io_memory(&controller->pci_state);
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index = pci_host_data_register_mmio(&controller->pci_state);
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if (index < 0)
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goto free;
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cpu_register_physical_memory(registers + PCIE500_CFGDATA, 4, index);
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@ -128,7 +128,7 @@ PCIBus *pci_prep_init(qemu_irq *pic)
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s->bus = pci_register_bus(NULL, "pci",
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prep_set_irq, prep_map_irq, pic, 0, 4);
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pci_host_config_register_ioport(0xcf8, s);
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pci_host_conf_register_ioport(0xcf8, s);
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pci_host_data_register_ioport(0xcfc, s);
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@ -84,8 +84,8 @@ static int pci_unin_main_init_device(SysBusDevice *dev)
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/* Uninorth main bus */
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s = FROM_SYSBUS(UNINState, dev);
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pci_mem_config = pci_host_config_register_io_memory(&s->host_state);
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pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
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pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
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pci_mem_data = pci_host_data_register_mmio(&s->host_state);
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sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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@ -103,8 +103,8 @@ static int pci_dec_21154_init_device(SysBusDevice *dev)
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s = FROM_SYSBUS(UNINState, dev);
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// XXX: s = &pci_bridge[2];
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pci_mem_config = pci_host_config_register_io_memory_noswap(&s->host_state);
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pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
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pci_mem_config = pci_host_conf_register_mmio_noswap(&s->host_state);
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pci_mem_data = pci_host_data_register_mmio(&s->host_state);
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sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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return 0;
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@ -118,8 +118,8 @@ static int pci_unin_agp_init_device(SysBusDevice *dev)
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/* Uninorth AGP bus */
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s = FROM_SYSBUS(UNINState, dev);
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pci_mem_config = pci_host_config_register_io_memory_noswap(&s->host_state);
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pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
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pci_mem_config = pci_host_conf_register_mmio_noswap(&s->host_state);
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pci_mem_data = pci_host_data_register_mmio(&s->host_state);
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sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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return 0;
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@ -133,8 +133,8 @@ static int pci_unin_internal_init_device(SysBusDevice *dev)
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/* Uninorth internal bus */
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s = FROM_SYSBUS(UNINState, dev);
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pci_mem_config = pci_host_config_register_io_memory_noswap(&s->host_state);
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pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
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pci_mem_config = pci_host_conf_register_mmio_noswap(&s->host_state);
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pci_mem_data = pci_host_data_register_mmio(&s->host_state);
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sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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return 0;
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