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Cadence: gem: fix wraparound in 64bit descriptors 

Wraparound of TX descriptor cyclic buffer only updated
the low 32 bits of the descriptor.
Fix that by checking if we're working with 64bit descriptors.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20200417171736.441607-1-rfried.dev@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Ramon Fried 2020-04-17 20:17:36 +03:00 committed by Peter Maydell
parent 681b5bc323
commit f1e7cb1388
1 changed files with 8 additions and 1 deletions
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9
hw/net/cadence_gem.c
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@ -1238,7 +1238,14 @@ static void gem_transmit(CadenceGEMState *s)
/* read next descriptor */
if (tx_desc_get_wrap(desc)) {
tx_desc_set_last(desc);
packet_desc_addr = s->regs[GEM_TXQBASE];
if (s->regs[GEM_DMACFG] & GEM_DMACFG_ADDR_64B) {
packet_desc_addr = s->regs[GEM_TBQPH];
packet_desc_addr <<= 32;
} else {
packet_desc_addr = 0;
}
packet_desc_addr |= s->regs[GEM_TXQBASE];
} else {
packet_desc_addr += 4 * gem_get_desc_len(s, false);
}