mirror of https://gitee.com/openkylin/qemu.git
target-microblaze: Tidy up the base-vectors property
Rename the "xlnx.base-vectors" string to "base-vectors" and move the base_vectors variable into the cfg struct. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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@ -56,12 +56,13 @@ typedef struct MicroBlazeCPUClass {
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typedef struct MicroBlazeCPU {
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typedef struct MicroBlazeCPU {
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/*< private >*/
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/*< private >*/
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CPUState parent_obj;
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CPUState parent_obj;
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uint32_t base_vectors;
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/*< public >*/
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/*< public >*/
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/* Microblaze Configuration Settings */
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/* Microblaze Configuration Settings */
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struct {
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struct {
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bool stackprot;
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bool stackprot;
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uint32_t base_vectors;
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} cfg;
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} cfg;
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CPUMBState env;
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CPUMBState env;
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@ -120,7 +120,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
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env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */
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env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */
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env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
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env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
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env->sregs[SR_PC] = cpu->base_vectors;
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env->sregs[SR_PC] = cpu->cfg.base_vectors;
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#if defined(CONFIG_USER_ONLY)
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#if defined(CONFIG_USER_ONLY)
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env->pvr.regs[10] = 0x0c000000; /* Spartan 3a dsp. */
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env->pvr.regs[10] = 0x0c000000; /* Spartan 3a dsp. */
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@ -158,7 +158,7 @@ static const VMStateDescription vmstate_mb_cpu = {
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};
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};
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static Property mb_properties[] = {
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static Property mb_properties[] = {
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DEFINE_PROP_UINT32("xlnx.base-vectors", MicroBlazeCPU, base_vectors, 0),
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DEFINE_PROP_UINT32("base-vectors", MicroBlazeCPU, cfg.base_vectors, 0),
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DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
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DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
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true),
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true),
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DEFINE_PROP_END_OF_LIST(),
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DEFINE_PROP_END_OF_LIST(),
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@ -154,7 +154,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
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env->sregs[SR_ESR], env->iflags);
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env->sregs[SR_ESR], env->iflags);
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log_cpu_state_mask(CPU_LOG_INT, cs, 0);
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log_cpu_state_mask(CPU_LOG_INT, cs, 0);
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env->iflags &= ~(IMM_FLAG | D_FLAG);
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env->iflags &= ~(IMM_FLAG | D_FLAG);
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env->sregs[SR_PC] = cpu->base_vectors + 0x20;
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env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x20;
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break;
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break;
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case EXCP_MMU:
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case EXCP_MMU:
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@ -194,7 +194,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
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env->sregs[SR_PC], env->sregs[SR_EAR], env->iflags);
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env->sregs[SR_PC], env->sregs[SR_EAR], env->iflags);
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log_cpu_state_mask(CPU_LOG_INT, cs, 0);
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log_cpu_state_mask(CPU_LOG_INT, cs, 0);
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env->iflags &= ~(IMM_FLAG | D_FLAG);
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env->iflags &= ~(IMM_FLAG | D_FLAG);
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env->sregs[SR_PC] = cpu->base_vectors + 0x20;
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env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x20;
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break;
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break;
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case EXCP_IRQ:
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case EXCP_IRQ:
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@ -235,7 +235,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
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env->sregs[SR_MSR] |= t;
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env->sregs[SR_MSR] |= t;
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env->regs[14] = env->sregs[SR_PC];
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env->regs[14] = env->sregs[SR_PC];
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env->sregs[SR_PC] = cpu->base_vectors + 0x10;
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env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x10;
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//log_cpu_state_mask(CPU_LOG_INT, cs, 0);
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//log_cpu_state_mask(CPU_LOG_INT, cs, 0);
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break;
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break;
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@ -254,7 +254,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
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if (cs->exception_index == EXCP_HW_BREAK) {
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if (cs->exception_index == EXCP_HW_BREAK) {
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env->regs[16] = env->sregs[SR_PC];
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env->regs[16] = env->sregs[SR_PC];
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env->sregs[SR_MSR] |= MSR_BIP;
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env->sregs[SR_MSR] |= MSR_BIP;
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env->sregs[SR_PC] = cpu->base_vectors + 0x18;
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env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x18;
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} else
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} else
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env->sregs[SR_PC] = env->btarget;
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env->sregs[SR_PC] = env->btarget;
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break;
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break;
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