mirror of https://gitee.com/openkylin/qemu.git
spapr: Eliminate SpaprIrq::init hook
This method is used to set up the interrupt backends for the current configuration. However, this means some confusing redirection between the "dual" mode init and the init hooks for xics only and xive only modes. Since we now have simple flags indicating whether XICS and/or XIVE are supported, it's easier to just open code each initialization directly in spapr_irq_init(). This will also make some future cleanups simpler. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org>
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@ -92,26 +92,6 @@ static void spapr_irq_init_kvm(SpaprMachineState *spapr,
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* XICS IRQ backend.
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*/
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static void spapr_irq_init_xics(SpaprMachineState *spapr, Error **errp)
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{
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Object *obj;
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Error *local_err = NULL;
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obj = object_new(TYPE_ICS_SPAPR);
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object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort);
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object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr),
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&error_fatal);
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object_property_set_int(obj, spapr->irq->nr_xirqs,
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"nr-irqs", &error_fatal);
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object_property_set_bool(obj, true, "realized", &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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spapr->ics = ICS_SPAPR(obj);
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}
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static int spapr_irq_claim_xics(SpaprMachineState *spapr, int irq, bool lsi,
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Error **errp)
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{
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@ -213,7 +193,6 @@ SpaprIrq spapr_irq_xics = {
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.xics = true,
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.xive = false,
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.init = spapr_irq_init_xics,
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.claim = spapr_irq_claim_xics,
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.free = spapr_irq_free_xics,
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.print_info = spapr_irq_print_info_xics,
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@ -228,33 +207,6 @@ SpaprIrq spapr_irq_xics = {
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/*
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* XIVE IRQ backend.
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*/
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static void spapr_irq_init_xive(SpaprMachineState *spapr, Error **errp)
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{
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uint32_t nr_servers = spapr_max_server_number(spapr);
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DeviceState *dev;
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int i;
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dev = qdev_create(NULL, TYPE_SPAPR_XIVE);
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qdev_prop_set_uint32(dev, "nr-irqs",
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spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE);
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/*
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* 8 XIVE END structures per CPU. One for each available priority
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*/
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qdev_prop_set_uint32(dev, "nr-ends", nr_servers << 3);
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qdev_init_nofail(dev);
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spapr->xive = SPAPR_XIVE(dev);
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/* Enable the CPU IPIs */
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for (i = 0; i < nr_servers; ++i) {
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if (spapr_xive_irq_claim(spapr->xive, SPAPR_IRQ_IPI + i,
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false, errp) < 0) {
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return;
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}
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}
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spapr_xive_hcall_init(spapr);
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}
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static int spapr_irq_claim_xive(SpaprMachineState *spapr, int irq, bool lsi,
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Error **errp)
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@ -354,7 +306,6 @@ SpaprIrq spapr_irq_xive = {
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.xics = false,
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.xive = true,
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.init = spapr_irq_init_xive,
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.claim = spapr_irq_claim_xive,
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.free = spapr_irq_free_xive,
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.print_info = spapr_irq_print_info_xive,
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@ -385,23 +336,6 @@ static SpaprIrq *spapr_irq_current(SpaprMachineState *spapr)
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&spapr_irq_xive : &spapr_irq_xics;
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}
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static void spapr_irq_init_dual(SpaprMachineState *spapr, Error **errp)
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{
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Error *local_err = NULL;
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spapr_irq_xics.init(spapr, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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spapr_irq_xive.init(spapr, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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}
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static int spapr_irq_claim_dual(SpaprMachineState *spapr, int irq, bool lsi,
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Error **errp)
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{
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@ -516,7 +450,6 @@ SpaprIrq spapr_irq_dual = {
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.xics = true,
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.xive = true,
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.init = spapr_irq_init_dual,
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.claim = spapr_irq_claim_dual,
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.free = spapr_irq_free_dual,
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.print_info = spapr_irq_print_info_dual,
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@ -612,7 +545,67 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp)
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spapr_irq_msi_init(spapr, spapr->irq->nr_msis);
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}
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spapr->irq->init(spapr, errp);
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if (spapr->irq->xics) {
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Error *local_err = NULL;
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Object *obj;
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obj = object_new(TYPE_ICS_SPAPR);
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object_property_add_child(OBJECT(spapr), "ics", obj, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr),
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&local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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object_property_set_int(obj, spapr->irq->nr_xirqs, "nr-irqs",
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&local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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object_property_set_bool(obj, true, "realized", &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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spapr->ics = ICS_SPAPR(obj);
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}
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if (spapr->irq->xive) {
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uint32_t nr_servers = spapr_max_server_number(spapr);
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DeviceState *dev;
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int i;
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dev = qdev_create(NULL, TYPE_SPAPR_XIVE);
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qdev_prop_set_uint32(dev, "nr-irqs",
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spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE);
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/*
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* 8 XIVE END structures per CPU. One for each available
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* priority
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*/
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qdev_prop_set_uint32(dev, "nr-ends", nr_servers << 3);
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qdev_init_nofail(dev);
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spapr->xive = SPAPR_XIVE(dev);
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/* Enable the CPU IPIs */
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for (i = 0; i < nr_servers; ++i) {
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if (spapr_xive_irq_claim(spapr->xive, SPAPR_IRQ_IPI + i,
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false, errp) < 0) {
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return;
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}
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}
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spapr_xive_hcall_init(spapr);
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}
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spapr->qirqs = qemu_allocate_irqs(spapr->irq->set_irq, spapr,
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spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE);
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@ -759,7 +752,6 @@ SpaprIrq spapr_irq_xics_legacy = {
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.xics = true,
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.xive = false,
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.init = spapr_irq_init_xics,
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.claim = spapr_irq_claim_xics,
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.free = spapr_irq_free_xics,
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.print_info = spapr_irq_print_info_xics,
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@ -42,7 +42,6 @@ typedef struct SpaprIrq {
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bool xics;
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bool xive;
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void (*init)(SpaprMachineState *spapr, Error **errp);
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int (*claim)(SpaprMachineState *spapr, int irq, bool lsi, Error **errp);
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void (*free)(SpaprMachineState *spapr, int irq);
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void (*print_info)(SpaprMachineState *spapr, Monitor *mon);
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