mirror of https://gitee.com/openkylin/qemu.git
Convert fdc to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl
parent
c70c59eeec
commit
f64ab228b8
93
hw/fdc.c
93
hw/fdc.c
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@ -26,11 +26,13 @@
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* The controller is used in Sun4m systems in a slightly different
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* way. There are changes in DOR register and DMA is not available.
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*/
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#include "hw.h"
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#include "fdc.h"
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#include "block.h"
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#include "qemu-timer.h"
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#include "isa.h"
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#include "sysbus.h"
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/********************************************************/
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/* debug Floppy devices */
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@ -468,6 +470,7 @@ enum {
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#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
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struct fdctrl_t {
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SysBusDevice busdev;
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/* Controller's identification */
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uint8_t version;
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/* HW */
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@ -1849,11 +1852,10 @@ static void fdctrl_result_timer(void *opaque)
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}
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/* Init functions */
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static fdctrl_t *fdctrl_init_common (qemu_irq irq, int dma_chann,
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target_phys_addr_t io_base,
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BlockDriverState **fds)
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static void fdctrl_init_common (fdctrl_t *fdctrl, int dma_chann,
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target_phys_addr_t io_base,
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BlockDriverState **fds)
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{
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fdctrl_t *fdctrl;
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int i, j;
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/* Fill 'command_to_handler' lookup table */
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@ -1865,13 +1867,11 @@ static fdctrl_t *fdctrl_init_common (qemu_irq irq, int dma_chann,
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}
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FLOPPY_DPRINTF("init controller\n");
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fdctrl = qemu_mallocz(sizeof(fdctrl_t));
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fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
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fdctrl->result_timer = qemu_new_timer(vm_clock,
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fdctrl_result_timer, fdctrl);
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fdctrl->version = 0x90; /* Intel 82078 controller */
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fdctrl->irq = irq;
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fdctrl->dma_chann = dma_chann;
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fdctrl->io_base = io_base;
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fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
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@ -1887,24 +1887,26 @@ static fdctrl_t *fdctrl_init_common (qemu_irq irq, int dma_chann,
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for (i = 0; i < MAX_FD; i++) {
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fd_revalidate(&fdctrl->drives[i]);
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}
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return fdctrl;
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}
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fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
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target_phys_addr_t io_base,
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BlockDriverState **fds)
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{
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DeviceState *dev;
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SysBusDevice *s;
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fdctrl_t *fdctrl;
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int io_mem;
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fdctrl = fdctrl_init_common(irq, dma_chann, io_base, fds);
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fdctrl->sun4m = 0;
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dev = qdev_create(NULL, "fdc");
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qdev_set_prop_int(dev, "strict_io", 0);
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qdev_set_prop_int(dev, "mem_mapped", mem_mapped);
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qdev_set_prop_int(dev, "sun4m", 0);
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qdev_init(dev);
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s = sysbus_from_qdev(dev);
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sysbus_connect_irq(s, 0, irq);
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fdctrl = FROM_SYSBUS(fdctrl_t, s);
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if (mem_mapped) {
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io_mem = cpu_register_io_memory(fdctrl_mem_read, fdctrl_mem_write,
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fdctrl);
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cpu_register_physical_memory(io_base, 0x08, io_mem);
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sysbus_mmio_map(s, 0, io_base);
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} else {
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register_ioport_read((uint32_t)io_base + 0x01, 5, 1,
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&fdctrl_read_port, fdctrl);
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@ -1916,22 +1918,67 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
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&fdctrl_write_port, fdctrl);
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}
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fdctrl_init_common(fdctrl, dma_chann, io_base, fds);
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return fdctrl;
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}
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fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
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BlockDriverState **fds, qemu_irq *fdc_tc)
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{
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DeviceState *dev;
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SysBusDevice *s;
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fdctrl_t *fdctrl;
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int io_mem;
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fdctrl = fdctrl_init_common(irq, -1, io_base, fds);
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fdctrl->sun4m = 1;
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io_mem = cpu_register_io_memory(fdctrl_mem_read_strict,
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fdctrl_mem_write_strict,
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fdctrl);
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cpu_register_physical_memory(io_base, 0x08, io_mem);
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*fdc_tc = *qemu_allocate_irqs(fdctrl_handle_tc, fdctrl, 1);
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dev = qdev_create(NULL, "fdc");
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qdev_set_prop_int(dev, "strict_io", 1);
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qdev_set_prop_int(dev, "mem_mapped", 1);
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qdev_set_prop_int(dev, "sun4m", 1);
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qdev_init(dev);
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s = sysbus_from_qdev(dev);
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sysbus_connect_irq(s, 0, irq);
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sysbus_mmio_map(s, 0, io_base);
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*fdc_tc = qdev_get_gpio_in(dev, 0);
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fdctrl = FROM_SYSBUS(fdctrl_t, s);
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fdctrl_init_common(fdctrl, -1, io_base, fds);
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return fdctrl;
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}
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static void fdc_init1(SysBusDevice *dev)
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{
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fdctrl_t *s = FROM_SYSBUS(fdctrl_t, dev);
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int io;
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sysbus_init_irq(dev, &s->irq);
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qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
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if (qdev_get_prop_int(&dev->qdev, "strict_io", 0)) {
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io = cpu_register_io_memory(fdctrl_mem_read_strict,
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fdctrl_mem_write_strict, s);
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} else {
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io = cpu_register_io_memory(fdctrl_mem_read, fdctrl_mem_write, s);
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}
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sysbus_init_mmio(dev, 0x08, io);
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}
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static SysBusDeviceInfo fdc_info = {
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.init = fdc_init1,
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.qdev.name = "fdc",
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.qdev.size = sizeof(fdctrl_t),
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.qdev.props = (DevicePropList[]) {
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{.name = "io_base", .type = PROP_TYPE_INT},
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{.name = "strict_io", .type = PROP_TYPE_INT},
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{.name = "mem_mapped", .type = PROP_TYPE_INT},
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{.name = "sun4m", .type = PROP_TYPE_INT},
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{.name = NULL}
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}
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};
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static void fdc_register_devices(void)
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{
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sysbus_register_withprop(&fdc_info);
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}
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device_init(fdc_register_devices)
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