From f8dc878efc45691be7e6c2019a19c271fb9aebbb Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Wed, 12 Aug 2020 12:13:38 -0700 Subject: [PATCH] target/riscv: Only support a single VSXL length Signed-off-by: Alistair Francis Message-id: f3f4fd2ec22a07cc1d750e96895d6813f131de4d.1597259519.git.alistair.francis@wdc.com Message-Id: --- target/riscv/csr.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index f9ac21d687..390ef781e4 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -836,12 +836,21 @@ static int write_satp(CPURISCVState *env, int csrno, target_ulong val) static int read_hstatus(CPURISCVState *env, int csrno, target_ulong *val) { *val = env->hstatus; +#ifdef TARGET_RISCV64 + /* We only support 64-bit VSXL */ + *val = set_field(*val, HSTATUS_VSXL, 2); +#endif return 0; } static int write_hstatus(CPURISCVState *env, int csrno, target_ulong val) { env->hstatus = val; +#ifdef TARGET_RISCV64 + if (get_field(val, HSTATUS_VSXL) != 2) { + qemu_log_mask(LOG_UNIMP, "QEMU does not support mixed HSXLEN options."); + } +#endif return 0; }