mirror of https://gitee.com/openkylin/qemu.git
Move the excess of arm_load_kernel() parameters into a struct.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4212 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
e22f8f39f3
commit
f93eb9ff66
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@ -21,10 +21,17 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
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const char *kernel_filename, const char *cpu_model);
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/* arm_boot.c */
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void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
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const char *kernel_cmdline, const char *initrd_filename,
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int board_id, target_phys_addr_t loader_start);
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struct arm_boot_info {
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int ram_size;
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const char *kernel_filename;
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const char *kernel_cmdline;
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const char *initrd_filename;
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target_phys_addr_t loader_start;
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int nb_cpus;
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int board_id;
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int (*atag_board)(struct arm_boot_info *info, void *p);
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};
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void arm_load_kernel(CPUState *env, struct arm_boot_info *info);
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/* armv7m_nvic.c */
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int system_clock_scale;
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118
hw/arm_boot.c
118
hw/arm_boot.c
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@ -47,21 +47,18 @@ static void main_cpu_reset(void *opaque)
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CPUState *env = opaque;
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cpu_reset(env);
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if (env->kernel_filename)
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arm_load_kernel(env, env->ram_size, env->kernel_filename,
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env->kernel_cmdline, env->initrd_filename,
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env->board_id, env->loader_start);
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if (env->boot_info)
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arm_load_kernel(env, env->boot_info);
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/* TODO: Reset secondary CPUs. */
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}
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static void set_kernel_args(uint32_t ram_size, int initrd_size,
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const char *kernel_cmdline,
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target_phys_addr_t loader_start)
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static void set_kernel_args(struct arm_boot_info *info,
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int initrd_size, void *base)
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{
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uint32_t *p;
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p = (uint32_t *)(phys_ram_base + KERNEL_ARGS_ADDR);
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p = (uint32_t *)(base + KERNEL_ARGS_ADDR);
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/* ATAG_CORE */
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stl_raw(p++, 5);
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stl_raw(p++, 0x54410001);
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@ -69,46 +66,55 @@ static void set_kernel_args(uint32_t ram_size, int initrd_size,
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stl_raw(p++, 0x1000);
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stl_raw(p++, 0);
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/* ATAG_MEM */
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/* TODO: handle multiple chips on one ATAG list */
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stl_raw(p++, 4);
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stl_raw(p++, 0x54410002);
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stl_raw(p++, ram_size);
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stl_raw(p++, loader_start);
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stl_raw(p++, info->ram_size);
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stl_raw(p++, info->loader_start);
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if (initrd_size) {
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/* ATAG_INITRD2 */
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stl_raw(p++, 4);
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stl_raw(p++, 0x54420005);
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stl_raw(p++, loader_start + INITRD_LOAD_ADDR);
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stl_raw(p++, info->loader_start + INITRD_LOAD_ADDR);
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stl_raw(p++, initrd_size);
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}
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if (kernel_cmdline && *kernel_cmdline) {
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if (info->kernel_cmdline && *info->kernel_cmdline) {
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/* ATAG_CMDLINE */
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int cmdline_size;
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cmdline_size = strlen(kernel_cmdline);
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memcpy (p + 2, kernel_cmdline, cmdline_size + 1);
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cmdline_size = strlen(info->kernel_cmdline);
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memcpy(p + 2, info->kernel_cmdline, cmdline_size + 1);
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cmdline_size = (cmdline_size >> 2) + 1;
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stl_raw(p++, cmdline_size + 2);
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stl_raw(p++, 0x54410009);
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p += cmdline_size;
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}
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if (info->atag_board) {
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/* ATAG_BOARD */
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int atag_board_len;
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atag_board_len = (info->atag_board(info, p + 2) + 3) >> 2;
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stl_raw(p++, 2 + atag_board_len);
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stl_raw(p++, 0x414f4d50);
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p += atag_board_len;
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}
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/* ATAG_END */
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stl_raw(p++, 0);
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stl_raw(p++, 0);
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}
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static void set_kernel_args_old(uint32_t ram_size, int initrd_size,
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const char *kernel_cmdline,
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target_phys_addr_t loader_start)
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static void set_kernel_args_old(struct arm_boot_info *info,
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int initrd_size, void *base)
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{
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uint32_t *p;
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unsigned char *s;
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/* see linux/include/asm-arm/setup.h */
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p = (uint32_t *)(phys_ram_base + KERNEL_ARGS_ADDR);
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p = (uint32_t *)(base + KERNEL_ARGS_ADDR);
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/* page_size */
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stl_raw(p++, 4096);
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/* nr_pages */
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stl_raw(p++, ram_size / 4096);
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stl_raw(p++, info->ram_size / 4096);
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/* ramdisk_size */
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stl_raw(p++, 0);
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#define FLAG_READONLY 1
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@ -142,7 +148,7 @@ static void set_kernel_args_old(uint32_t ram_size, int initrd_size,
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stl_raw(p++, 0);
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/* initrd_start */
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if (initrd_size)
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stl_raw(p++, loader_start + INITRD_LOAD_ADDR);
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stl_raw(p++, info->loader_start + INITRD_LOAD_ADDR);
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else
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stl_raw(p++, 0);
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/* initrd_size */
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@ -159,17 +165,15 @@ static void set_kernel_args_old(uint32_t ram_size, int initrd_size,
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stl_raw(p++, 0);
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/* zero unused fields */
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memset(p, 0, 256 + 1024 -
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(p - ((uint32_t *)(phys_ram_base + KERNEL_ARGS_ADDR))));
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s = phys_ram_base + KERNEL_ARGS_ADDR + 256 + 1024;
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if (kernel_cmdline)
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strcpy (s, kernel_cmdline);
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(p - ((uint32_t *)(base + KERNEL_ARGS_ADDR))));
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s = base + KERNEL_ARGS_ADDR + 256 + 1024;
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if (info->kernel_cmdline)
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strcpy (s, info->kernel_cmdline);
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else
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stb_raw(s, 0);
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}
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void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
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const char *kernel_cmdline, const char *initrd_filename,
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int board_id, target_phys_addr_t loader_start)
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void arm_load_kernel(CPUState *env, struct arm_boot_info *info)
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{
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int kernel_size;
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int initrd_size;
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@ -177,36 +181,41 @@ void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
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int is_linux = 0;
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uint64_t elf_entry;
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target_ulong entry;
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uint32_t pd;
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void *loader_phys;
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/* Load the kernel. */
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if (!kernel_filename) {
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if (!info->kernel_filename) {
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fprintf(stderr, "Kernel image must be specified\n");
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exit(1);
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}
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if (!env->kernel_filename) {
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env->ram_size = ram_size;
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env->kernel_filename = kernel_filename;
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env->kernel_cmdline = kernel_cmdline;
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env->initrd_filename = initrd_filename;
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env->board_id = board_id;
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env->loader_start = loader_start;
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if (!env->boot_info) {
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if (info->nb_cpus == 0)
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info->nb_cpus = 1;
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env->boot_info = info;
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qemu_register_reset(main_cpu_reset, env);
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}
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pd = cpu_get_physical_page_desc(info->loader_start);
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loader_phys = phys_ram_base + (pd & TARGET_PAGE_MASK) +
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(info->loader_start & ~TARGET_PAGE_MASK);
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/* Assume that raw images are linux kernels, and ELF images are not. */
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kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL);
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kernel_size = load_elf(info->kernel_filename, 0, &elf_entry, NULL, NULL);
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entry = elf_entry;
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if (kernel_size < 0) {
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kernel_size = load_uboot(kernel_filename, &entry, &is_linux);
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kernel_size = load_uboot(info->kernel_filename, &entry, &is_linux);
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}
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if (kernel_size < 0) {
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kernel_size = load_image(kernel_filename,
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phys_ram_base + KERNEL_LOAD_ADDR);
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entry = loader_start + KERNEL_LOAD_ADDR;
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kernel_size = load_image(info->kernel_filename,
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loader_phys + KERNEL_LOAD_ADDR);
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entry = info->loader_start + KERNEL_LOAD_ADDR;
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is_linux = 1;
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}
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if (kernel_size < 0) {
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fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename);
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fprintf(stderr, "qemu: could not load kernel '%s'\n",
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info->kernel_filename);
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exit(1);
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}
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if (!is_linux) {
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@ -214,30 +223,29 @@ void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
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env->regs[15] = entry & 0xfffffffe;
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env->thumb = entry & 1;
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} else {
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if (initrd_filename) {
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initrd_size = load_image(initrd_filename,
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phys_ram_base + INITRD_LOAD_ADDR);
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if (info->initrd_filename) {
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initrd_size = load_image(info->initrd_filename,
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loader_phys + INITRD_LOAD_ADDR);
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if (initrd_size < 0) {
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fprintf(stderr, "qemu: could not load initrd '%s'\n",
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initrd_filename);
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info->initrd_filename);
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exit(1);
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}
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} else {
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initrd_size = 0;
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}
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bootloader[1] |= board_id & 0xff;
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bootloader[2] |= (board_id >> 8) & 0xff;
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bootloader[5] = loader_start + KERNEL_ARGS_ADDR;
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bootloader[1] |= info->board_id & 0xff;
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bootloader[2] |= (info->board_id >> 8) & 0xff;
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bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
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bootloader[6] = entry;
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for (n = 0; n < sizeof(bootloader) / 4; n++)
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stl_raw(phys_ram_base + (n * 4), bootloader[n]);
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for (n = 0; n < sizeof(smpboot) / 4; n++)
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stl_raw(phys_ram_base + ram_size + (n * 4), smpboot[n]);
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stl_raw(loader_phys + (n * 4), bootloader[n]);
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if (info->nb_cpus > 1)
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for (n = 0; n < sizeof(smpboot) / 4; n++)
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stl_raw(loader_phys + info->ram_size + (n * 4), smpboot[n]);
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if (old_param)
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set_kernel_args_old(ram_size, initrd_size,
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kernel_cmdline, loader_start);
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set_kernel_args_old(info, initrd_size, loader_phys);
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else
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set_kernel_args(ram_size, initrd_size,
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kernel_cmdline, loader_start);
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set_kernel_args(info, initrd_size, loader_phys);
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}
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}
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@ -469,6 +469,11 @@ static void icp_control_init(uint32_t base)
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/* Board init. */
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static struct arm_boot_info integrator_binfo = {
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.loader_start = 0x0,
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.board_id = 0x113,
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};
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static void integratorcp_init(int ram_size, int vga_ram_size,
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const char *boot_device, DisplayState *ds,
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const char *kernel_filename, const char *kernel_cmdline,
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@ -527,8 +532,11 @@ static void integratorcp_init(int ram_size, int vga_ram_size,
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}
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pl110_init(ds, 0xc0000000, pic[22], 0);
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arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline,
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initrd_filename, 0x113, 0x0);
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integrator_binfo.ram_size = ram_size;
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integrator_binfo.kernel_filename = kernel_filename;
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integrator_binfo.kernel_cmdline = kernel_cmdline;
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integrator_binfo.initrd_filename = initrd_filename;
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arm_load_kernel(env, &integrator_binfo);
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}
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QEMUMachine integratorcp_machine = {
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@ -59,12 +59,17 @@ static struct keymap map[0xE0] = {
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enum mainstone_model_e { mainstone };
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static struct arm_boot_info mainstone_binfo = {
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.loader_start = PXA2XX_SDRAM_BASE,
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.ram_size = 0x04000000,
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};
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static void mainstone_common_init(int ram_size, int vga_ram_size,
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DisplayState *ds, const char *kernel_filename,
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const char *kernel_cmdline, const char *initrd_filename,
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const char *cpu_model, enum mainstone_model_e model, int arm_id)
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{
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uint32_t mainstone_ram = 0x04000000;
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uint32_t mainstone_ram = mainstone_binfo.ram_size;
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uint32_t mainstone_rom = 0x00800000;
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uint32_t mainstone_flash = 0x02000000;
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uint32_t sector_len = 256 * 1024;
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@ -90,7 +95,7 @@ static void mainstone_common_init(int ram_size, int vga_ram_size,
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qemu_ram_alloc(mainstone_rom) | IO_MEM_ROM);
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/* Setup initial (reset) machine state */
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cpu->env->regs[15] = PXA2XX_SDRAM_BASE;
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cpu->env->regs[15] = mainstone_binfo.loader_start;
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/* There are two 32MiB flash devices on the board */
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for (i = 0; i < 2; i ++) {
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@ -121,8 +126,11 @@ static void mainstone_common_init(int ram_size, int vga_ram_size,
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smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]);
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arm_load_kernel(cpu->env, mainstone_ram, kernel_filename, kernel_cmdline,
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initrd_filename, arm_id, PXA2XX_SDRAM_BASE);
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mainstone_binfo.kernel_filename = kernel_filename;
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mainstone_binfo.kernel_cmdline = kernel_cmdline;
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mainstone_binfo.initrd_filename = initrd_filename;
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mainstone_binfo.board_id = arm_id;
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arm_load_kernel(cpu->env, &mainstone_binfo);
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}
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static void mainstone_init(int ram_size, int vga_ram_size,
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16
hw/palm.c
16
hw/palm.c
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@ -183,6 +183,12 @@ static void palmte_gpio_setup(struct omap_mpu_state_s *cpu)
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qemu_irq_raise(omap_mpuio_in_get(cpu->mpuio)[11]);
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}
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static struct arm_boot_info palmte_binfo = {
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.loader_start = OMAP_EMIFF_BASE,
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.ram_size = 0x02000000,
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.board_id = 0x331,
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};
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static void palmte_init(int ram_size, int vga_ram_size,
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const char *boot_device, DisplayState *ds,
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const char *kernel_filename, const char *kernel_cmdline,
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@ -190,7 +196,7 @@ static void palmte_init(int ram_size, int vga_ram_size,
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{
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struct omap_mpu_state_s *cpu;
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int flash_size = 0x00800000;
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int sdram_size = 0x02000000;
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int sdram_size = palmte_binfo.ram_size;
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int io;
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static uint32_t cs0val = 0xffffffff;
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static uint32_t cs1val = 0x0000e1a0;
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@ -250,10 +256,12 @@ static void palmte_init(int ram_size, int vga_ram_size,
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/* Load the kernel. */
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if (kernel_filename) {
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/* Start at bootloader. */
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cpu->env->regs[15] = OMAP_EMIFF_BASE;
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cpu->env->regs[15] = palmte_binfo.loader_start;
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arm_load_kernel(cpu->env, sdram_size, kernel_filename, kernel_cmdline,
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initrd_filename, 0x331, OMAP_EMIFF_BASE);
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palmte_binfo.kernel_filename = kernel_filename;
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palmte_binfo.kernel_cmdline = kernel_cmdline;
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palmte_binfo.initrd_filename = initrd_filename;
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arm_load_kernel(cpu->env, &palmte_binfo);
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}
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dpy_resize(ds, 320, 320);
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@ -18,6 +18,11 @@
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/* Board init. */
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static struct arm_boot_info realview_binfo = {
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.loader_start = 0x0,
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.board_id = 0x33b,
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};
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static void realview_init(int ram_size, int vga_ram_size,
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const char *boot_device, DisplayState *ds,
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const char *kernel_filename, const char *kernel_cmdline,
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@ -177,8 +182,12 @@ static void realview_init(int ram_size, int vga_ram_size,
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/* 0x68000000 PCI mem 1. */
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/* 0x6c000000 PCI mem 2. */
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arm_load_kernel(first_cpu, ram_size, kernel_filename, kernel_cmdline,
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initrd_filename, 0x33b, 0x0);
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realview_binfo.ram_size = ram_size;
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realview_binfo.kernel_filename = kernel_filename;
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realview_binfo.kernel_cmdline = kernel_cmdline;
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realview_binfo.initrd_filename = initrd_filename;
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realview_binfo.nb_cpus = ncpu;
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arm_load_kernel(first_cpu, &realview_binfo);
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/* ??? Hack to map an additional page of ram for the secondary CPU
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startup code. I guess this works on real hardware because the
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16
hw/spitz.c
16
hw/spitz.c
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@ -1180,12 +1180,17 @@ static void sl_bootparam_write(uint32_t ptr)
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/* Board init. */
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enum spitz_model_e { spitz, akita, borzoi, terrier };
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static struct arm_boot_info spitz_binfo = {
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.loader_start = PXA2XX_SDRAM_BASE,
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.ram_size = 0x04000000,
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};
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static void spitz_common_init(int ram_size, int vga_ram_size,
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DisplayState *ds, const char *kernel_filename,
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||||
const char *kernel_cmdline, const char *initrd_filename,
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const char *cpu_model, enum spitz_model_e model, int arm_id)
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{
|
||||
uint32_t spitz_ram = 0x04000000;
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||||
uint32_t spitz_ram = spitz_binfo.ram_size;
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||||
uint32_t spitz_rom = 0x00800000;
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||||
struct pxa2xx_state_s *cpu;
|
||||
struct scoop_info_s *scp;
|
||||
|
@ -1230,10 +1235,13 @@ static void spitz_common_init(int ram_size, int vga_ram_size,
|
|||
spitz_microdrive_attach(cpu);
|
||||
|
||||
/* Setup initial (reset) machine state */
|
||||
cpu->env->regs[15] = PXA2XX_SDRAM_BASE;
|
||||
cpu->env->regs[15] = spitz_binfo.loader_start;
|
||||
|
||||
arm_load_kernel(cpu->env, spitz_ram, kernel_filename, kernel_cmdline,
|
||||
initrd_filename, arm_id, PXA2XX_SDRAM_BASE);
|
||||
spitz_binfo.kernel_filename = kernel_filename;
|
||||
spitz_binfo.kernel_cmdline = kernel_cmdline;
|
||||
spitz_binfo.initrd_filename = initrd_filename;
|
||||
spitz_binfo.board_id = arm_id;
|
||||
arm_load_kernel(cpu->env, &spitz_binfo);
|
||||
sl_bootparam_write(SL_PXA_PARAM_BASE - PXA2XX_SDRAM_BASE);
|
||||
}
|
||||
|
||||
|
|
|
@ -157,6 +157,8 @@ static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq)
|
|||
peripherans and expansion busses. For now we emulate a subset of the
|
||||
PB peripherals and just change the board ID. */
|
||||
|
||||
static struct arm_boot_info versatile_binfo;
|
||||
|
||||
static void versatile_init(int ram_size, int vga_ram_size,
|
||||
const char *boot_device, DisplayState *ds,
|
||||
const char *kernel_filename, const char *kernel_cmdline,
|
||||
|
@ -283,8 +285,12 @@ static void versatile_init(int ram_size, int vga_ram_size,
|
|||
/* 0x101f3000 UART2. */
|
||||
/* 0x101f4000 SSPI. */
|
||||
|
||||
arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline,
|
||||
initrd_filename, board_id, 0x0);
|
||||
versatile_binfo.ram_size = ram_size;
|
||||
versatile_binfo.kernel_filename = kernel_filename;
|
||||
versatile_binfo.kernel_cmdline = kernel_cmdline;
|
||||
versatile_binfo.initrd_filename = initrd_filename;
|
||||
versatile_binfo.board_id = board_id;
|
||||
arm_load_kernel(env, &versatile_binfo);
|
||||
}
|
||||
|
||||
static void vpb_init(int ram_size, int vga_ram_size,
|
||||
|
|
|
@ -55,6 +55,8 @@ typedef void ARMWriteCPFunc(void *opaque, int cp_info,
|
|||
typedef uint32_t ARMReadCPFunc(void *opaque, int cp_info,
|
||||
int dstreg, int operand);
|
||||
|
||||
struct arm_boot_info;
|
||||
|
||||
#define NB_MMU_MODES 2
|
||||
|
||||
/* We currently assume float and double are IEEE single and double
|
||||
|
@ -196,12 +198,7 @@ typedef struct CPUARMState {
|
|||
CPU_COMMON
|
||||
|
||||
/* These fields after the common ones so they are preserved on reset. */
|
||||
int ram_size;
|
||||
const char *kernel_filename;
|
||||
const char *kernel_cmdline;
|
||||
const char *initrd_filename;
|
||||
int board_id;
|
||||
target_phys_addr_t loader_start;
|
||||
struct arm_boot_info *boot_info;
|
||||
} CPUARMState;
|
||||
|
||||
CPUARMState *cpu_arm_init(const char *cpu_model);
|
||||
|
|
Loading…
Reference in New Issue