mirror of https://gitee.com/openkylin/qemu.git
Remove vga_ram_size
The vga_ram_size argument to machine init functions always has the same value, and is ignored by many machines (including SPARC32 which has an obsolete ifdef for VGA_RAM_SIZE). Remove it and push VGA_RAM_SIZE into vga_int.h. Signed-off-by: Paul Brook <paul@codesourcery.com>
This commit is contained in:
parent
1481e16abb
commit
fbe1b5953d
hw
an5206.caxis_dev88.cboards.hcirrus_vga.cdummy_m68k.cetraxfs.cg364fb.cgumstix.cintegratorcp.cmainstone.cmcf5208.cmips.hmips_jazz.cmips_malta.cmips_mipssim.cmips_r4k.cmusicpal.cnseries.comap_sx1.cpalm.cpc.cpc.hpci.hppc405_boards.cppc440_bamboo.cppc_newworld.cppc_oldworld.cppc_prep.cppce500_mpc8544ds.cr2d.crealview.cshix.cspitz.cstellaris.csun4m.csun4u.ctosa.cversatilepb.cvga.cvga_int.hvmware_vga.c
vl.c
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@ -27,7 +27,7 @@ void irq_info(Monitor *mon)
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/* Board init. */
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/* Board init. */
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static void an5206_init(ram_addr_t ram_size, int vga_ram_size,
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static void an5206_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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@ -251,7 +251,7 @@ static void main_cpu_reset(void *opaque)
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}
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}
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static
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static
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void axisdev88_init (ram_addr_t ram_size, int vga_ram_size,
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void axisdev88_init (ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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@ -3,7 +3,7 @@
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#ifndef HW_BOARDS_H
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#ifndef HW_BOARDS_H
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#define HW_BOARDS_H
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#define HW_BOARDS_H
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typedef void QEMUMachineInitFunc(ram_addr_t ram_size, int vga_ram_size,
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typedef void QEMUMachineInitFunc(ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *kernel_cmdline,
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@ -3239,13 +3239,13 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci)
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*
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*
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***************************************/
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***************************************/
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void isa_cirrus_vga_init(int vga_ram_size)
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void isa_cirrus_vga_init(void)
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{
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{
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CirrusVGAState *s;
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CirrusVGAState *s;
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s = qemu_mallocz(sizeof(CirrusVGAState));
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s = qemu_mallocz(sizeof(CirrusVGAState));
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vga_common_init(&s->vga, vga_ram_size);
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vga_common_init(&s->vga, VGA_RAM_SIZE);
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cirrus_init_common(s, CIRRUS_ID_CLGD5430, 0);
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cirrus_init_common(s, CIRRUS_ID_CLGD5430, 0);
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s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
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s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
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s->vga.screen_dump, s->vga.text_update,
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s->vga.screen_dump, s->vga.text_update,
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@ -3301,7 +3301,7 @@ static void pci_cirrus_write_config(PCIDevice *d,
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cirrus_update_memory_access(s);
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cirrus_update_memory_access(s);
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}
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}
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void pci_cirrus_vga_init(PCIBus *bus, int vga_ram_size)
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void pci_cirrus_vga_init(PCIBus *bus)
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{
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{
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PCICirrusVGAState *d;
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PCICirrusVGAState *d;
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uint8_t *pci_conf;
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uint8_t *pci_conf;
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@ -3323,7 +3323,7 @@ void pci_cirrus_vga_init(PCIBus *bus, int vga_ram_size)
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/* setup VGA */
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/* setup VGA */
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s = &d->cirrus_vga;
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s = &d->cirrus_vga;
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vga_common_init(&s->vga, vga_ram_size);
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vga_common_init(&s->vga, VGA_RAM_SIZE);
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cirrus_init_common(s, device_id, 1);
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cirrus_init_common(s, device_id, 1);
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s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
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s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
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@ -14,7 +14,7 @@
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/* Board init. */
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/* Board init. */
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static void dummy_m68k_init(ram_addr_t ram_size, int vga_ram_size,
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static void dummy_m68k_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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@ -46,7 +46,7 @@ static void main_cpu_reset(void *opaque)
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}
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}
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static
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static
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void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,
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void bareetraxfs_init (ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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@ -584,7 +584,7 @@ static void g364fb_save(QEMUFile *f, void *opaque)
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qemu_put_be32(f, s->height);
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qemu_put_be32(f, s->height);
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}
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}
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int g364fb_mm_init(int vram_size, target_phys_addr_t vram_base,
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int g364fb_mm_init(target_phys_addr_t vram_base,
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target_phys_addr_t ctrl_base, int it_shift,
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target_phys_addr_t ctrl_base, int it_shift,
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qemu_irq irq)
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qemu_irq irq)
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{
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{
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@ -593,9 +593,9 @@ int g364fb_mm_init(int vram_size, target_phys_addr_t vram_base,
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s = qemu_mallocz(sizeof(G364State));
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s = qemu_mallocz(sizeof(G364State));
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s->vram_offset = qemu_ram_alloc(vram_size);
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s->vram_size = 8 * 1024 * 1024;
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s->vram_offset = qemu_ram_alloc(s->vram_size);
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s->vram = qemu_get_ram_ptr(s->vram_offset);
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s->vram = qemu_get_ram_ptr(s->vram_offset);
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s->vram_size = vram_size;
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s->irq = irq;
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s->irq = irq;
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qemu_register_reset(g364fb_reset, s);
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qemu_register_reset(g364fb_reset, s);
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@ -41,7 +41,7 @@
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static const int sector_len = 128 * 1024;
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static const int sector_len = 128 * 1024;
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static void connex_init(ram_addr_t ram_size, int vga_ram_size,
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static void connex_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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@ -75,7 +75,7 @@ static void connex_init(ram_addr_t ram_size, int vga_ram_size,
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pxa2xx_gpio_in_get(cpu->gpio)[36]);
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pxa2xx_gpio_in_get(cpu->gpio)[36]);
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}
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}
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static void verdex_init(ram_addr_t ram_size, int vga_ram_size,
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static void verdex_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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@ -449,7 +449,7 @@ static struct arm_boot_info integrator_binfo = {
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.board_id = 0x113,
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.board_id = 0x113,
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};
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};
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static void integratorcp_init(ram_addr_t ram_size, int vga_ram_size,
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static void integratorcp_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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@ -68,7 +68,7 @@ static struct arm_boot_info mainstone_binfo = {
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.ram_size = 0x04000000,
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.ram_size = 0x04000000,
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};
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};
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static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size,
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static void mainstone_common_init(ram_addr_t ram_size,
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const char *kernel_filename,
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const char *kernel_filename,
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const char *kernel_cmdline, const char *initrd_filename,
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const char *kernel_cmdline, const char *initrd_filename,
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const char *cpu_model, enum mainstone_model_e model, int arm_id)
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const char *cpu_model, enum mainstone_model_e model, int arm_id)
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arm_load_kernel(cpu->env, &mainstone_binfo);
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arm_load_kernel(cpu->env, &mainstone_binfo);
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}
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}
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static void mainstone_init(ram_addr_t ram_size, int vga_ram_size,
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static void mainstone_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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{
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{
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mainstone_common_init(ram_size, vga_ram_size, kernel_filename,
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mainstone_common_init(ram_size, kernel_filename,
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kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
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kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
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}
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}
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@ -193,7 +193,7 @@ static void mcf5208_sys_init(qemu_irq *pic)
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}
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}
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}
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}
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static void mcf5208evb_init(ram_addr_t ram_size, int vga_ram_size,
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static void mcf5208evb_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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@ -10,7 +10,7 @@ void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
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void ds1225y_set_protection(void *opaque, int protection);
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void ds1225y_set_protection(void *opaque, int protection);
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/* g364fb.c */
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/* g364fb.c */
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int g364fb_mm_init(int vram_size, target_phys_addr_t vram_base,
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int g364fb_mm_init(target_phys_addr_t vram_base,
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target_phys_addr_t ctrl_base, int it_shift,
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target_phys_addr_t ctrl_base, int it_shift,
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qemu_irq irq);
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qemu_irq irq);
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@ -119,7 +119,7 @@ static void audio_init(qemu_irq *pic)
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#define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
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#define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
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static
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static
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void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
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void mips_jazz_init (ram_addr_t ram_size,
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const char *cpu_model,
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const char *cpu_model,
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enum jazz_model_e jazz_model)
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enum jazz_model_e jazz_model)
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{
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{
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@ -198,10 +198,10 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
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/* Video card */
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/* Video card */
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switch (jazz_model) {
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switch (jazz_model) {
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case JAZZ_MAGNUM:
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case JAZZ_MAGNUM:
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g364fb_mm_init(vga_ram_size, 0x40000000, 0x60000000, 0, rc4030[3]);
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g364fb_mm_init(0x40000000, 0x60000000, 0, rc4030[3]);
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break;
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break;
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case JAZZ_PICA61:
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case JAZZ_PICA61:
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isa_vga_mm_init(vga_ram_size, 0x40000000, 0x60000000, 0);
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isa_vga_mm_init(0x40000000, 0x60000000, 0);
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break;
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break;
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default:
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default:
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break;
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break;
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@ -282,21 +282,21 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
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}
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}
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static
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static
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void mips_magnum_init (ram_addr_t ram_size, int vga_ram_size,
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void mips_magnum_init (ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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{
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{
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mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_MAGNUM);
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mips_jazz_init(ram_size, cpu_model, JAZZ_MAGNUM);
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}
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}
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static
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static
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void mips_pica61_init (ram_addr_t ram_size, int vga_ram_size,
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void mips_pica61_init (ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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{
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{
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mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_PICA61);
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mips_jazz_init(ram_size, cpu_model, JAZZ_PICA61);
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}
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}
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QEMUMachine mips_magnum_machine = {
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QEMUMachine mips_magnum_machine = {
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@ -758,7 +758,7 @@ static void main_cpu_reset(void *opaque)
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}
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}
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static
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static
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void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
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void mips_malta_init (ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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@ -942,11 +942,11 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
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/* Optional PCI video card */
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/* Optional PCI video card */
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if (cirrus_vga_enabled) {
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if (cirrus_vga_enabled) {
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pci_cirrus_vga_init(pci_bus, vga_ram_size);
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pci_cirrus_vga_init(pci_bus);
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} else if (vmsvga_enabled) {
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} else if (vmsvga_enabled) {
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pci_vmsvga_init(pci_bus, vga_ram_size);
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pci_vmsvga_init(pci_bus);
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} else if (std_vga_enabled) {
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} else if (std_vga_enabled) {
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pci_vga_init(pci_bus, vga_ram_size, 0, 0);
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pci_vga_init(pci_bus, 0, 0);
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}
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}
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}
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}
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@ -107,7 +107,7 @@ static void main_cpu_reset(void *opaque)
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}
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}
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static void
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static void
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mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
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mips_mipssim_init (ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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@ -147,7 +147,7 @@ static void main_cpu_reset(void *opaque)
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static const int sector_len = 32 * 1024;
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static const int sector_len = 32 * 1024;
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static
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static
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void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
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void mips_r4k_init (ram_addr_t ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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||||||
|
@ -254,7 +254,7 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
isa_vga_init(vga_ram_size);
|
isa_vga_init();
|
||||||
|
|
||||||
if (nd_table[0].vlan)
|
if (nd_table[0].vlan)
|
||||||
isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
|
isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
|
||||||
|
|
|
@ -1512,7 +1512,7 @@ static struct arm_boot_info musicpal_binfo = {
|
||||||
.board_id = 0x20e,
|
.board_id = 0x20e,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void musicpal_init(ram_addr_t ram_size, int vga_ram_size,
|
static void musicpal_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
|
|
@ -1382,7 +1382,7 @@ static struct arm_boot_info n810_binfo = {
|
||||||
.atag_board = n810_atag_setup,
|
.atag_board = n810_atag_setup,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void n800_init(ram_addr_t ram_size, int vga_ram_size,
|
static void n800_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -1392,7 +1392,7 @@ static void n800_init(ram_addr_t ram_size, int vga_ram_size,
|
||||||
cpu_model, &n800_binfo, 800);
|
cpu_model, &n800_binfo, 800);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void n810_init(ram_addr_t ram_size, int vga_ram_size,
|
static void n810_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
|
|
@ -115,7 +115,7 @@ static struct arm_boot_info sx1_binfo = {
|
||||||
.board_id = 0x265,
|
.board_id = 0x265,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void sx1_init(ram_addr_t ram_size, int vga_ram_size,
|
static void sx1_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model,
|
const char *initrd_filename, const char *cpu_model,
|
||||||
|
@ -205,21 +205,21 @@ static void sx1_init(ram_addr_t ram_size, int vga_ram_size,
|
||||||
//~ qemu_console_resize(ds, 640, 480);
|
//~ qemu_console_resize(ds, 640, 480);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void sx1_init_v1(ram_addr_t ram_size, int vga_ram_size,
|
static void sx1_init_v1(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
sx1_init(ram_size, vga_ram_size, boot_device, kernel_filename,
|
sx1_init(ram_size, boot_device, kernel_filename,
|
||||||
kernel_cmdline, initrd_filename, cpu_model, 1);
|
kernel_cmdline, initrd_filename, cpu_model, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void sx1_init_v2(ram_addr_t ram_size, int vga_ram_size,
|
static void sx1_init_v2(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
sx1_init(ram_size, vga_ram_size, boot_device, kernel_filename,
|
sx1_init(ram_size, boot_device, kernel_filename,
|
||||||
kernel_cmdline, initrd_filename, cpu_model, 2);
|
kernel_cmdline, initrd_filename, cpu_model, 2);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -193,7 +193,7 @@ static struct arm_boot_info palmte_binfo = {
|
||||||
.board_id = 0x331,
|
.board_id = 0x331,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void palmte_init(ram_addr_t ram_size, int vga_ram_size,
|
static void palmte_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
|
20
hw/pc.c
20
hw/pc.c
|
@ -836,7 +836,7 @@ static int load_option_rom(const char *oprom, target_phys_addr_t start,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* PC hardware initialisation */
|
/* PC hardware initialisation */
|
||||||
static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
|
static void pc_init1(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename,
|
const char *initrd_filename,
|
||||||
|
@ -999,20 +999,20 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
|
||||||
|
|
||||||
if (cirrus_vga_enabled) {
|
if (cirrus_vga_enabled) {
|
||||||
if (pci_enabled) {
|
if (pci_enabled) {
|
||||||
pci_cirrus_vga_init(pci_bus, vga_ram_size);
|
pci_cirrus_vga_init(pci_bus);
|
||||||
} else {
|
} else {
|
||||||
isa_cirrus_vga_init(vga_ram_size);
|
isa_cirrus_vga_init();
|
||||||
}
|
}
|
||||||
} else if (vmsvga_enabled) {
|
} else if (vmsvga_enabled) {
|
||||||
if (pci_enabled)
|
if (pci_enabled)
|
||||||
pci_vmsvga_init(pci_bus, vga_ram_size);
|
pci_vmsvga_init(pci_bus);
|
||||||
else
|
else
|
||||||
fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
||||||
} else if (std_vga_enabled) {
|
} else if (std_vga_enabled) {
|
||||||
if (pci_enabled) {
|
if (pci_enabled) {
|
||||||
pci_vga_init(pci_bus, vga_ram_size, 0, 0);
|
pci_vga_init(pci_bus, 0, 0);
|
||||||
} else {
|
} else {
|
||||||
isa_vga_init(vga_ram_size);
|
isa_vga_init();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1162,26 +1162,26 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
|
static void pc_init_pci(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline,
|
const char *kernel_cmdline,
|
||||||
const char *initrd_filename,
|
const char *initrd_filename,
|
||||||
const char *cpu_model)
|
const char *cpu_model)
|
||||||
{
|
{
|
||||||
pc_init1(ram_size, vga_ram_size, boot_device,
|
pc_init1(ram_size, boot_device,
|
||||||
kernel_filename, kernel_cmdline,
|
kernel_filename, kernel_cmdline,
|
||||||
initrd_filename, 1, cpu_model);
|
initrd_filename, 1, cpu_model);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
|
static void pc_init_isa(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline,
|
const char *kernel_cmdline,
|
||||||
const char *initrd_filename,
|
const char *initrd_filename,
|
||||||
const char *cpu_model)
|
const char *cpu_model)
|
||||||
{
|
{
|
||||||
pc_init1(ram_size, vga_ram_size, boot_device,
|
pc_init1(ram_size, boot_device,
|
||||||
kernel_filename, kernel_cmdline,
|
kernel_filename, kernel_cmdline,
|
||||||
initrd_filename, 0, cpu_model);
|
initrd_filename, 0, cpu_model);
|
||||||
}
|
}
|
||||||
|
|
16
hw/pc.h
16
hw/pc.h
|
@ -138,21 +138,15 @@ enum vga_retrace_method {
|
||||||
|
|
||||||
extern enum vga_retrace_method vga_retrace_method;
|
extern enum vga_retrace_method vga_retrace_method;
|
||||||
|
|
||||||
#if !defined(TARGET_SPARC) || defined(TARGET_SPARC64)
|
int isa_vga_init(void);
|
||||||
#define VGA_RAM_SIZE (8192 * 1024)
|
int pci_vga_init(PCIBus *bus,
|
||||||
#else
|
|
||||||
#define VGA_RAM_SIZE (9 * 1024 * 1024)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
int isa_vga_init(int vga_ram_size);
|
|
||||||
int pci_vga_init(PCIBus *bus, int vga_ram_size,
|
|
||||||
unsigned long vga_bios_offset, int vga_bios_size);
|
unsigned long vga_bios_offset, int vga_bios_size);
|
||||||
int isa_vga_mm_init(int vga_ram_size, target_phys_addr_t vram_base,
|
int isa_vga_mm_init(target_phys_addr_t vram_base,
|
||||||
target_phys_addr_t ctrl_base, int it_shift);
|
target_phys_addr_t ctrl_base, int it_shift);
|
||||||
|
|
||||||
/* cirrus_vga.c */
|
/* cirrus_vga.c */
|
||||||
void pci_cirrus_vga_init(PCIBus *bus, int vga_ram_size);
|
void pci_cirrus_vga_init(PCIBus *bus);
|
||||||
void isa_cirrus_vga_init(int vga_ram_size);
|
void isa_cirrus_vga_init(void);
|
||||||
|
|
||||||
/* ide.c */
|
/* ide.c */
|
||||||
void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
|
void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
|
||||||
|
|
2
hw/pci.h
2
hw/pci.h
|
@ -223,7 +223,7 @@ void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
|
||||||
void *lsi_scsi_init(PCIBus *bus, int devfn);
|
void *lsi_scsi_init(PCIBus *bus, int devfn);
|
||||||
|
|
||||||
/* vmware_vga.c */
|
/* vmware_vga.c */
|
||||||
void pci_vmsvga_init(PCIBus *bus, int vga_ram_size);
|
void pci_vmsvga_init(PCIBus *bus);
|
||||||
|
|
||||||
/* usb-uhci.c */
|
/* usb-uhci.c */
|
||||||
void usb_uhci_piix3_init(PCIBus *bus, int devfn);
|
void usb_uhci_piix3_init(PCIBus *bus, int devfn);
|
||||||
|
|
|
@ -169,7 +169,7 @@ static void ref405ep_fpga_init (uint32_t base)
|
||||||
qemu_register_reset(&ref405ep_fpga_reset, fpga);
|
qemu_register_reset(&ref405ep_fpga_reset, fpga);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ref405ep_init (ram_addr_t ram_size, int vga_ram_size,
|
static void ref405ep_init (ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline,
|
const char *kernel_cmdline,
|
||||||
|
@ -487,7 +487,7 @@ static void taihu_cpld_init (uint32_t base)
|
||||||
qemu_register_reset(&taihu_cpld_reset, cpld);
|
qemu_register_reset(&taihu_cpld_reset, cpld);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void taihu_405ep_init(ram_addr_t ram_size, int vga_ram_size,
|
static void taihu_405ep_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline,
|
const char *kernel_cmdline,
|
||||||
|
|
|
@ -84,7 +84,7 @@ out:
|
||||||
return fdt;
|
return fdt;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void bamboo_init(ram_addr_t ram_size, int vga_ram_size,
|
static void bamboo_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline,
|
const char *kernel_cmdline,
|
||||||
|
|
|
@ -85,7 +85,7 @@ static int fw_cfg_boot_set(void *opaque, const char *boot_device)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* PowerPC Mac99 hardware initialisation */
|
/* PowerPC Mac99 hardware initialisation */
|
||||||
static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
|
static void ppc_core99_init (ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline,
|
const char *kernel_cmdline,
|
||||||
|
@ -284,8 +284,7 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
|
||||||
pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
|
pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
|
||||||
pci_bus = pci_pmac_init(pic);
|
pci_bus = pci_pmac_init(pic);
|
||||||
/* init basic PC hardware */
|
/* init basic PC hardware */
|
||||||
pci_vga_init(pci_bus, vga_ram_size,
|
pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
|
||||||
vga_bios_offset, vga_bios_size);
|
|
||||||
|
|
||||||
/* XXX: suppress that */
|
/* XXX: suppress that */
|
||||||
dummy_irq = i8259_init(NULL);
|
dummy_irq = i8259_init(NULL);
|
||||||
|
|
|
@ -114,7 +114,7 @@ static int fw_cfg_boot_set(void *opaque, const char *boot_device)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
|
static void ppc_heathrow_init (ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline,
|
const char *kernel_cmdline,
|
||||||
|
@ -298,8 +298,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
|
pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
|
||||||
pci_bus = pci_grackle_init(0xfec00000, pic);
|
pci_bus = pci_grackle_init(0xfec00000, pic);
|
||||||
pci_vga_init(pci_bus, vga_ram_size,
|
pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
|
||||||
vga_bios_offset, vga_bios_size);
|
|
||||||
|
|
||||||
escc_mem_index = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0],
|
escc_mem_index = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0],
|
||||||
serial_hds[1], ESCC_CLOCK, 4);
|
serial_hds[1], ESCC_CLOCK, 4);
|
||||||
|
|
|
@ -530,7 +530,7 @@ static CPUReadMemoryFunc *PPC_prep_io_read[] = {
|
||||||
#define NVRAM_SIZE 0x2000
|
#define NVRAM_SIZE 0x2000
|
||||||
|
|
||||||
/* PowerPC PREP hardware initialisation */
|
/* PowerPC PREP hardware initialisation */
|
||||||
static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
|
static void ppc_prep_init (ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline,
|
const char *kernel_cmdline,
|
||||||
|
@ -656,7 +656,7 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
|
||||||
cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory);
|
cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory);
|
||||||
|
|
||||||
/* init basic PC hardware */
|
/* init basic PC hardware */
|
||||||
pci_vga_init(pci_bus, vga_ram_size, 0, 0);
|
pci_vga_init(pci_bus, 0, 0);
|
||||||
// openpic = openpic_init(0x00000000, 0xF0000000, 1);
|
// openpic = openpic_init(0x00000000, 0xF0000000, 1);
|
||||||
// pit = pit_init(0x40, i8259[0]);
|
// pit = pit_init(0x40, i8259[0]);
|
||||||
rtc_init(0x70, i8259[8], 2000);
|
rtc_init(0x70, i8259[8], 2000);
|
||||||
|
|
|
@ -151,7 +151,7 @@ out:
|
||||||
return fdt;
|
return fdt;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mpc8544ds_init(ram_addr_t ram_size, int vga_ram_size,
|
static void mpc8544ds_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline,
|
const char *kernel_cmdline,
|
||||||
|
|
2
hw/r2d.c
2
hw/r2d.c
|
@ -193,7 +193,7 @@ static int r2d_pci_map_irq(PCIDevice *d, int irq_num)
|
||||||
return intx[d->devfn >> 3];
|
return intx[d->devfn >> 3];
|
||||||
}
|
}
|
||||||
|
|
||||||
static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
|
static void r2d_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
|
|
@ -24,7 +24,7 @@ static struct arm_boot_info realview_binfo = {
|
||||||
.board_id = 0x33b,
|
.board_id = 0x33b,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void realview_init(ram_addr_t ram_size, int vga_ram_size,
|
static void realview_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
|
|
@ -46,7 +46,7 @@ void pic_info(Monitor *mon)
|
||||||
/* XXXXX */
|
/* XXXXX */
|
||||||
}
|
}
|
||||||
|
|
||||||
static void shix_init(ram_addr_t ram_size, int vga_ram_size,
|
static void shix_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
|
18
hw/spitz.c
18
hw/spitz.c
|
@ -903,7 +903,7 @@ static struct arm_boot_info spitz_binfo = {
|
||||||
.ram_size = 0x04000000,
|
.ram_size = 0x04000000,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size,
|
static void spitz_common_init(ram_addr_t ram_size,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline, const char *initrd_filename,
|
const char *kernel_cmdline, const char *initrd_filename,
|
||||||
const char *cpu_model, enum spitz_model_e model, int arm_id)
|
const char *cpu_model, enum spitz_model_e model, int arm_id)
|
||||||
|
@ -959,39 +959,39 @@ static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size,
|
||||||
sl_bootparam_write(SL_PXA_PARAM_BASE);
|
sl_bootparam_write(SL_PXA_PARAM_BASE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void spitz_init(ram_addr_t ram_size, int vga_ram_size,
|
static void spitz_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
spitz_common_init(ram_size, vga_ram_size, kernel_filename,
|
spitz_common_init(ram_size, kernel_filename,
|
||||||
kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
|
kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void borzoi_init(ram_addr_t ram_size, int vga_ram_size,
|
static void borzoi_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
spitz_common_init(ram_size, vga_ram_size, kernel_filename,
|
spitz_common_init(ram_size, kernel_filename,
|
||||||
kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
|
kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void akita_init(ram_addr_t ram_size, int vga_ram_size,
|
static void akita_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
spitz_common_init(ram_size, vga_ram_size, kernel_filename,
|
spitz_common_init(ram_size, kernel_filename,
|
||||||
kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
|
kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void terrier_init(ram_addr_t ram_size, int vga_ram_size,
|
static void terrier_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
spitz_common_init(ram_size, vga_ram_size, kernel_filename,
|
spitz_common_init(ram_size, kernel_filename,
|
||||||
kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
|
kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1373,7 +1373,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* FIXME: Figure out how to generate these from stellaris_boards. */
|
/* FIXME: Figure out how to generate these from stellaris_boards. */
|
||||||
static void lm3s811evb_init(ram_addr_t ram_size, int vga_ram_size,
|
static void lm3s811evb_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -1381,7 +1381,7 @@ static void lm3s811evb_init(ram_addr_t ram_size, int vga_ram_size,
|
||||||
stellaris_init(kernel_filename, cpu_model, &stellaris_boards[0]);
|
stellaris_init(kernel_filename, cpu_model, &stellaris_boards[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void lm3s6965evb_init(ram_addr_t ram_size, int vga_ram_size,
|
static void lm3s6965evb_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
|
24
hw/sun4m.c
24
hw/sun4m.c
|
@ -931,7 +931,7 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
/* SPARCstation 5 hardware initialisation */
|
/* SPARCstation 5 hardware initialisation */
|
||||||
static void ss5_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void ss5_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -941,7 +941,7 @@ static void ss5_init(ram_addr_t RAM_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation 10 hardware initialisation */
|
/* SPARCstation 10 hardware initialisation */
|
||||||
static void ss10_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void ss10_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -951,7 +951,7 @@ static void ss10_init(ram_addr_t RAM_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCserver 600MP hardware initialisation */
|
/* SPARCserver 600MP hardware initialisation */
|
||||||
static void ss600mp_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void ss600mp_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename,
|
const char *kernel_filename,
|
||||||
const char *kernel_cmdline,
|
const char *kernel_cmdline,
|
||||||
|
@ -962,7 +962,7 @@ static void ss600mp_init(ram_addr_t RAM_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation 20 hardware initialisation */
|
/* SPARCstation 20 hardware initialisation */
|
||||||
static void ss20_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void ss20_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -972,7 +972,7 @@ static void ss20_init(ram_addr_t RAM_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation Voyager hardware initialisation */
|
/* SPARCstation Voyager hardware initialisation */
|
||||||
static void vger_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void vger_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -982,7 +982,7 @@ static void vger_init(ram_addr_t RAM_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation LX hardware initialisation */
|
/* SPARCstation LX hardware initialisation */
|
||||||
static void ss_lx_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void ss_lx_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -992,7 +992,7 @@ static void ss_lx_init(ram_addr_t RAM_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation 4 hardware initialisation */
|
/* SPARCstation 4 hardware initialisation */
|
||||||
static void ss4_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void ss4_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -1002,7 +1002,7 @@ static void ss4_init(ram_addr_t RAM_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCClassic hardware initialisation */
|
/* SPARCClassic hardware initialisation */
|
||||||
static void scls_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void scls_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -1012,7 +1012,7 @@ static void scls_init(ram_addr_t RAM_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCbook hardware initialisation */
|
/* SPARCbook hardware initialisation */
|
||||||
static void sbook_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void sbook_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -1313,7 +1313,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCserver 1000 hardware initialisation */
|
/* SPARCserver 1000 hardware initialisation */
|
||||||
static void ss1000_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void ss1000_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -1323,7 +1323,7 @@ static void ss1000_init(ram_addr_t RAM_size, int vga_ram_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCcenter 2000 hardware initialisation */
|
/* SPARCcenter 2000 hardware initialisation */
|
||||||
static void ss2000_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void ss2000_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
@ -1539,7 +1539,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation 2 hardware initialisation */
|
/* SPARCstation 2 hardware initialisation */
|
||||||
static void ss2_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void ss2_init(ram_addr_t RAM_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
|
16
hw/sun4u.c
16
hw/sun4u.c
|
@ -326,7 +326,7 @@ pci_ebus_init(PCIBus *bus, int devfn)
|
||||||
ebus_mmio_mapfunc);
|
ebus_mmio_mapfunc);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void sun4uv_init(ram_addr_t RAM_size,
|
||||||
const char *boot_devices,
|
const char *boot_devices,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model,
|
const char *initrd_filename, const char *cpu_model,
|
||||||
|
@ -447,7 +447,7 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
|
||||||
pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL, &pci_bus2,
|
pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL, &pci_bus2,
|
||||||
&pci_bus3);
|
&pci_bus3);
|
||||||
isa_mem_base = VGA_BASE;
|
isa_mem_base = VGA_BASE;
|
||||||
pci_vga_init(pci_bus, vga_ram_size, 0, 0);
|
pci_vga_init(pci_bus, 0, 0);
|
||||||
|
|
||||||
// XXX Should be pci_bus3
|
// XXX Should be pci_bus3
|
||||||
pci_ebus_init(pci_bus, -1);
|
pci_ebus_init(pci_bus, -1);
|
||||||
|
@ -560,32 +560,32 @@ static const struct hwdef hwdefs[] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Sun4u hardware initialisation */
|
/* Sun4u hardware initialisation */
|
||||||
static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void sun4u_init(ram_addr_t RAM_size,
|
||||||
const char *boot_devices,
|
const char *boot_devices,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
sun4uv_init(RAM_size, vga_ram_size, boot_devices, kernel_filename,
|
sun4uv_init(RAM_size, boot_devices, kernel_filename,
|
||||||
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[0]);
|
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Sun4v hardware initialisation */
|
/* Sun4v hardware initialisation */
|
||||||
static void sun4v_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void sun4v_init(ram_addr_t RAM_size,
|
||||||
const char *boot_devices,
|
const char *boot_devices,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
sun4uv_init(RAM_size, vga_ram_size, boot_devices, kernel_filename,
|
sun4uv_init(RAM_size, boot_devices, kernel_filename,
|
||||||
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[1]);
|
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[1]);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Niagara hardware initialisation */
|
/* Niagara hardware initialisation */
|
||||||
static void niagara_init(ram_addr_t RAM_size, int vga_ram_size,
|
static void niagara_init(ram_addr_t RAM_size,
|
||||||
const char *boot_devices,
|
const char *boot_devices,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
sun4uv_init(RAM_size, vga_ram_size, boot_devices, kernel_filename,
|
sun4uv_init(RAM_size, boot_devices, kernel_filename,
|
||||||
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[2]);
|
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[2]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -196,7 +196,7 @@ static struct arm_boot_info tosa_binfo = {
|
||||||
.ram_size = 0x04000000,
|
.ram_size = 0x04000000,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void tosa_init(ram_addr_t ram_size, int vga_ram_size,
|
static void tosa_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
|
|
|
@ -153,7 +153,7 @@ static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq)
|
||||||
|
|
||||||
static struct arm_boot_info versatile_binfo;
|
static struct arm_boot_info versatile_binfo;
|
||||||
|
|
||||||
static void versatile_init(ram_addr_t ram_size, int vga_ram_size,
|
static void versatile_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model,
|
const char *initrd_filename, const char *cpu_model,
|
||||||
|
@ -289,23 +289,23 @@ static void versatile_init(ram_addr_t ram_size, int vga_ram_size,
|
||||||
arm_load_kernel(env, &versatile_binfo);
|
arm_load_kernel(env, &versatile_binfo);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void vpb_init(ram_addr_t ram_size, int vga_ram_size,
|
static void vpb_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
versatile_init(ram_size, vga_ram_size,
|
versatile_init(ram_size,
|
||||||
boot_device,
|
boot_device,
|
||||||
kernel_filename, kernel_cmdline,
|
kernel_filename, kernel_cmdline,
|
||||||
initrd_filename, cpu_model, 0x183);
|
initrd_filename, cpu_model, 0x183);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void vab_init(ram_addr_t ram_size, int vga_ram_size,
|
static void vab_init(ram_addr_t ram_size,
|
||||||
const char *boot_device,
|
const char *boot_device,
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
const char *kernel_filename, const char *kernel_cmdline,
|
||||||
const char *initrd_filename, const char *cpu_model)
|
const char *initrd_filename, const char *cpu_model)
|
||||||
{
|
{
|
||||||
versatile_init(ram_size, vga_ram_size,
|
versatile_init(ram_size,
|
||||||
boot_device,
|
boot_device,
|
||||||
kernel_filename, kernel_cmdline,
|
kernel_filename, kernel_cmdline,
|
||||||
initrd_filename, cpu_model, 0x25e);
|
initrd_filename, cpu_model, 0x25e);
|
||||||
|
|
20
hw/vga.c
20
hw/vga.c
|
@ -2428,13 +2428,13 @@ static void vga_mm_init(VGAState *s, target_phys_addr_t vram_base,
|
||||||
qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000);
|
qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000);
|
||||||
}
|
}
|
||||||
|
|
||||||
int isa_vga_init(int vga_ram_size)
|
int isa_vga_init(void)
|
||||||
{
|
{
|
||||||
VGAState *s;
|
VGAState *s;
|
||||||
|
|
||||||
s = qemu_mallocz(sizeof(VGAState));
|
s = qemu_mallocz(sizeof(VGAState));
|
||||||
|
|
||||||
vga_common_init(s, vga_ram_size);
|
vga_common_init(s, VGA_RAM_SIZE);
|
||||||
vga_init(s);
|
vga_init(s);
|
||||||
|
|
||||||
s->ds = graphic_console_init(s->update, s->invalidate,
|
s->ds = graphic_console_init(s->update, s->invalidate,
|
||||||
|
@ -2443,19 +2443,19 @@ int isa_vga_init(int vga_ram_size)
|
||||||
#ifdef CONFIG_BOCHS_VBE
|
#ifdef CONFIG_BOCHS_VBE
|
||||||
/* XXX: use optimized standard vga accesses */
|
/* XXX: use optimized standard vga accesses */
|
||||||
cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
|
cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
|
||||||
vga_ram_size, s->vram_offset);
|
VGA_RAM_SIZE, s->vram_offset);
|
||||||
#endif
|
#endif
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int isa_vga_mm_init(int vga_ram_size, target_phys_addr_t vram_base,
|
int isa_vga_mm_init(target_phys_addr_t vram_base,
|
||||||
target_phys_addr_t ctrl_base, int it_shift)
|
target_phys_addr_t ctrl_base, int it_shift)
|
||||||
{
|
{
|
||||||
VGAState *s;
|
VGAState *s;
|
||||||
|
|
||||||
s = qemu_mallocz(sizeof(VGAState));
|
s = qemu_mallocz(sizeof(VGAState));
|
||||||
|
|
||||||
vga_common_init(s, vga_ram_size);
|
vga_common_init(s, VGA_RAM_SIZE);
|
||||||
vga_mm_init(s, vram_base, ctrl_base, it_shift);
|
vga_mm_init(s, vram_base, ctrl_base, it_shift);
|
||||||
|
|
||||||
s->ds = graphic_console_init(s->update, s->invalidate,
|
s->ds = graphic_console_init(s->update, s->invalidate,
|
||||||
|
@ -2464,7 +2464,7 @@ int isa_vga_mm_init(int vga_ram_size, target_phys_addr_t vram_base,
|
||||||
#ifdef CONFIG_BOCHS_VBE
|
#ifdef CONFIG_BOCHS_VBE
|
||||||
/* XXX: use optimized standard vga accesses */
|
/* XXX: use optimized standard vga accesses */
|
||||||
cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
|
cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
|
||||||
vga_ram_size, s->vram_offset);
|
VGA_RAM_SIZE, s->vram_offset);
|
||||||
#endif
|
#endif
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -2480,7 +2480,7 @@ static void pci_vga_write_config(PCIDevice *d,
|
||||||
s->map_addr = 0;
|
s->map_addr = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int pci_vga_init(PCIBus *bus, int vga_ram_size,
|
int pci_vga_init(PCIBus *bus,
|
||||||
unsigned long vga_bios_offset, int vga_bios_size)
|
unsigned long vga_bios_offset, int vga_bios_size)
|
||||||
{
|
{
|
||||||
PCIVGAState *d;
|
PCIVGAState *d;
|
||||||
|
@ -2494,7 +2494,7 @@ int pci_vga_init(PCIBus *bus, int vga_ram_size,
|
||||||
return -1;
|
return -1;
|
||||||
s = &d->vga_state;
|
s = &d->vga_state;
|
||||||
|
|
||||||
vga_common_init(s, vga_ram_size);
|
vga_common_init(s, VGA_RAM_SIZE);
|
||||||
vga_init(s);
|
vga_init(s);
|
||||||
|
|
||||||
s->ds = graphic_console_init(s->update, s->invalidate,
|
s->ds = graphic_console_init(s->update, s->invalidate,
|
||||||
|
@ -2509,8 +2509,8 @@ int pci_vga_init(PCIBus *bus, int vga_ram_size,
|
||||||
pci_config_set_class(pci_conf, PCI_CLASS_DISPLAY_VGA);
|
pci_config_set_class(pci_conf, PCI_CLASS_DISPLAY_VGA);
|
||||||
pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
|
pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
|
||||||
|
|
||||||
/* XXX: vga_ram_size must be a power of two */
|
/* XXX: VGA_RAM_SIZE must be a power of two */
|
||||||
pci_register_io_region(&d->dev, 0, vga_ram_size,
|
pci_register_io_region(&d->dev, 0, VGA_RAM_SIZE,
|
||||||
PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map);
|
PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map);
|
||||||
if (vga_bios_size != 0) {
|
if (vga_bios_size != 0) {
|
||||||
unsigned int bios_total_size;
|
unsigned int bios_total_size;
|
||||||
|
|
|
@ -215,3 +215,6 @@ void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
|
||||||
|
|
||||||
extern const uint8_t sr_mask[8];
|
extern const uint8_t sr_mask[8];
|
||||||
extern const uint8_t gr_mask[16];
|
extern const uint8_t gr_mask[16];
|
||||||
|
|
||||||
|
#define VGA_RAM_SIZE (8192 * 1024)
|
||||||
|
|
||||||
|
|
|
@ -1210,7 +1210,7 @@ static void pci_vmsvga_map_mem(PCIDevice *pci_dev, int region_num,
|
||||||
iomemtype);
|
iomemtype);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pci_vmsvga_init(PCIBus *bus, int vga_ram_size)
|
void pci_vmsvga_init(PCIBus *bus)
|
||||||
{
|
{
|
||||||
struct pci_vmsvga_state_s *s;
|
struct pci_vmsvga_state_s *s;
|
||||||
|
|
||||||
|
@ -1233,10 +1233,10 @@ void pci_vmsvga_init(PCIBus *bus, int vga_ram_size)
|
||||||
|
|
||||||
pci_register_io_region(&s->card, 0, 0x10,
|
pci_register_io_region(&s->card, 0, 0x10,
|
||||||
PCI_ADDRESS_SPACE_IO, pci_vmsvga_map_ioport);
|
PCI_ADDRESS_SPACE_IO, pci_vmsvga_map_ioport);
|
||||||
pci_register_io_region(&s->card, 1, vga_ram_size,
|
pci_register_io_region(&s->card, 1, VGA_RAM_SIZE,
|
||||||
PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem);
|
PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem);
|
||||||
|
|
||||||
vmsvga_init(&s->chip, vga_ram_size);
|
vmsvga_init(&s->chip, VGA_RAM_SIZE);
|
||||||
|
|
||||||
register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s);
|
register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s);
|
||||||
}
|
}
|
||||||
|
|
4
vl.c
4
vl.c
|
@ -199,7 +199,6 @@ static IOPortWriteFunc *ioport_write_table[3][MAX_IOPORTS];
|
||||||
to store the VM snapshots */
|
to store the VM snapshots */
|
||||||
DriveInfo drives_table[MAX_DRIVES+1];
|
DriveInfo drives_table[MAX_DRIVES+1];
|
||||||
int nb_drives;
|
int nb_drives;
|
||||||
static int vga_ram_size;
|
|
||||||
enum vga_retrace_method vga_retrace_method = VGA_RETRACE_DUMB;
|
enum vga_retrace_method vga_retrace_method = VGA_RETRACE_DUMB;
|
||||||
static DisplayState *display_state;
|
static DisplayState *display_state;
|
||||||
int nographic;
|
int nographic;
|
||||||
|
@ -4875,7 +4874,6 @@ int main(int argc, char **argv, char **envp)
|
||||||
cpu_model = NULL;
|
cpu_model = NULL;
|
||||||
initrd_filename = NULL;
|
initrd_filename = NULL;
|
||||||
ram_size = 0;
|
ram_size = 0;
|
||||||
vga_ram_size = VGA_RAM_SIZE;
|
|
||||||
snapshot = 0;
|
snapshot = 0;
|
||||||
nographic = 0;
|
nographic = 0;
|
||||||
curses = 0;
|
curses = 0;
|
||||||
|
@ -5898,7 +5896,7 @@ int main(int argc, char **argv, char **envp)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
machine->init(ram_size, vga_ram_size, boot_devices,
|
machine->init(ram_size, boot_devices,
|
||||||
kernel_filename, kernel_cmdline, initrd_filename, cpu_model);
|
kernel_filename, kernel_cmdline, initrd_filename, cpu_model);
|
||||||
|
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue