These are the regression tests for integer addition MSA instruction
- various flavors of instruction add (ADD, ADDS, HADD,...).
Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551718283-4487-3-git-send-email-mateja.marjanovic@rt-rk.com>
Add tests for MSA pack instructions. This includes following
instructions:
* PCKEV.B - pack even (bytes)
* PCKEV.H - pack even (halfwords)
* PCKEV.W - pack even (words)
* PCKEV.D - pack even (doublewords)
* PCKOD.B - pack odd (bytes)
* PCKOD.H - pack odd (halfwords)
* PCKOD.W - pack odd (words)
* PCKOD.D - pack odd (doublewords)
* VSHF.B - data preserving shuffle (bytes)
* VSHF.H - data preserving shuffle (halfwords)
* VSHF.W - data preserving shuffle (words)
* VSHF.D - data preserving shuffle (doublewords)
Each test consists of 80 test cases, so altogether there are 960
test cases.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-15-git-send-email-aleksandar.markovic@rt-rk.com>
Add tests for MIPS64R6 integer multiply instructions: MUL, MUH, MULU,
MUHU, DMUL, DMUH, DMULU, and DMUHU.
MUH and MUHU require 64 bit inputs in the form of 64-bit sign-extended
32-bit inputs.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-14-git-send-email-aleksandar.markovic@rt-rk.com>
Add tests for MIPS64R6 bit count instructions: CLO, CLZ, DCLO, and DCLZ.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-12-git-send-email-aleksandar.markovic@rt-rk.com>
Add tests for MIPS64R6 bit swap instructions: BITSWAP and DBITSWAP.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-11-git-send-email-aleksandar.markovic@rt-rk.com>
Add wrappers for some MIPS64R6 instructions.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-9-git-send-email-aleksandar.markovic@rt-rk.com>
Add macros that will allow testing cases when one of the source
registers is identical to the destination register.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-8-git-send-email-aleksandar.markovic@rt-rk.com>
Add "static" and "const" modifiers where appropriate, and fix other
minor issues.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-7-git-send-email-aleksandar.markovic@rt-rk.com>
Add test utilities for 64-bit tests. Some of MIPS64R6 instructions
require 64-bit inputs to be 32-bit integers sign-extedned to 64 bits,
hence the need for sets of such inputs.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-6-git-send-email-aleksandar.markovic@rt-rk.com>
Add test utilities for 32-bit tests.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-5-git-send-email-aleksandar.markovic@rt-rk.com>
Add wrappers for various MSA integer instructions.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-4-git-send-email-aleksandar.markovic@rt-rk.com>
Make windowed register tests conditional on the presence of this option.
Fix tests to work correctly for both 32 and 64 physical registers.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Make s32c1i tests conditional on the presence of this option. Initialize
ATOMCTL SR when it's present to allow RCW transactions on uncached
memory.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
SR tests generate instructions that the assembler does not recognize and
thus must take care about configuration endianness.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Make tests for specific special registers conditional on the presence of
the options that add these registers and test that the registers are not
accessible otherwise.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Make timer/CCOUNT tests conditional on the presence of timer option and
number of configured timers. Don't use hard coded interrupt levels for
timers, use configured values.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Make interrupt tests conditional on the presence of interrupt option and
on the presence of level-1 and high level software interrupts. Don't use
hard-coded interrupt level for the high level interrupt tests, choose
high level software IRQ and use its configured level.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Make tests for optional instruction groups conditional on the presence
of corresponding options in the config.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Make data/instruction tests conditional on the presence of
data/instruction cache, whether they're lockable and whether data cache
is writeback.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Make debug tests conditional on the presence of the debug option in the
config and tests that depend on the presence/number of instruction or
data breakpoint registers on the corresponding definitions. Use
configured debug interrupt level instead of the hardcoded value to set
up IRQ handler and access debug EPC register.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Uncomment test_boolean in the test makefile. Make actual tests code
conditional on the presence of boolean option in the config.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Use bbci.l/bbsi.l instead of bbci/bbsi, as they are assembly macros that
accept little-endian bit number and produce correct immediate for both
little and big endian configurations. Choose value loaded into register
for bbc/bbs opcodes based on configuration endianness.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Don't use 'loop' opcode in generic testsuite completion code, only use
core opcodes to make it work with any configuration.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Configurations with LITBASE register may use absolute literals by
default. Pass --no-absolute-literals option to assembler to use
PC-relative literals instead.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Configurations w/o vecbase may have vectors not grouped together and not
in fixed order. They may not always be grouped into single output
sections by assigning next offset to dot, as it may sometimes move dot
backwards and sometimes they may even belong to different memory region.
Don't group vectors into single output section. Instead put each vector
into its own section ant put it at its default virtual address.
Reserve 4KBytes from the default vectors base and put rest of the code
and data starting from there. Mark vectors sections as executable,
otherwise their contents is discarded. There may be as little as 16
bytes reserved for some vectors, load handler address into a0 and use
ret.n to jump there to make vector code fit into this 16 byte space.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
When test suite with multiple tests fails it's not obvious which test
failed. Pring "failed" in every invocation of test_fail. Do printing
when DEBUG preprocessor macro is defined.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Add tests for MSA integer max/min instructions. This includes
following instructions:
* MAX_A.B - maximum of absolute of two signed values (bytes)
* MAX_A.H - maximum of absolute of two signed values (halfwords)
* MAX_A.W - maximum of absolute of two signed values (words)
* MAX_A.D - maximum of absolute of two signed values (doublewords)
* MIN_A.B - minimum of absolute of two signed values (bytes)
* MIN_A.H - minimum of absolute of two signed values (halfwords)
* MIN_A.W - minimum of absolute of two signed values (words)
* MIN_A.D - minimum of absolute of two signed values (doublewords)
* MAX_S.B - maximum of two signed values (bytes)
* MAX_S.H - maximum of two signed values (halfwords)
* MAX_S.W - maximum of two signed values (words)
* MAX_S.D - maximum of two signed values (doublewords)
* MIN_S.B - minimum of two signed values (bytes)
* MIN_S.H - minimum of two signed values (halfwords)
* MIN_S.W - minimum of two signed values (words)
* MIN_S.D - minimum of two signed values (doublewords)
* MAX_U.B - maximum of two unsigned values (bytes)
* MAX_U.H - maximum of two unsigned values (halfwords)
* MAX_U.W - maximum of two unsigned values (words)
* MAX_U.D - maximum of two unsigned values (doublewords)
* MIN_U.B - minimum of two unsigned values (bytes)
* MIN_U.H - minimum of two unsigned values (halfwords)
* MIN_U.W - minimum of two unsigned values (words)
* MIN_U.D - minimum of two unsigned values (doublewords)
Each test consists of 80 test cases, so altogether there are 1920
test cases.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551185735-17154-8-git-send-email-aleksandar.markovic@rt-rk.com>
Add tests for MSA integer compare instructions. This includes
following instructions:
* CEQ.B - integer compare equal (bytes)
* CEQ.H - integer compare equal (halfwords)
* CEQ.W - integer compare equal (words)
* CEQ.D - integer compare equal (doublewords)
* CLE_S.B - signed integer compare less or equal (bytes)
* CLE_S.H - signed integer compare less or equal (halfwords)
* CLE_S.W - signed integer compare less or equal (words)
* CLE_S.D - signed integer compare less or equal (doublewords)
* CLE_U.B - unsigned integer compare less or equal (bytes)
* CLE_U.H - unsigned integer compare less or equal (halfwords)
* CLE_U.W - unsigned integer compare less or equal (words)
* CLE_U.D - unsigned integer compare less or equal (doublewords)
* CLT_S.B - signed integer compare less or equal (bytes)
* CLT_S.H - signed integer compare less or equal (halfwords)
* CLT_S.W - signed integer compare less or equal (words)
* CLT_S.D - signed integer compare less or equal (doublewords)
* CLT_U.B - unsigned integer compare less or equal (bytes)
* CLT_U.H - unsigned integer compare less or equal (halfwords)
* CLT_U.W - unsigned integer compare less or equal (words)
* CLT_U.D - unsigned integer compare less or equal (doublewords)
Each test consists of 80 test cases, so altogether there are 1600 test
cases.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551185735-17154-2-git-send-email-aleksandar.markovic@rt-rk.com>
Add wrappers for MSA integer compare instructions.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Change directory name 'bit-counting' to 'bit-count'. This is just for
cosmetic and consistency sake. This was the only subdirectory in MSA
test directory that uses ending 'ing'.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Correct path to headers in tests/tcg/mips/user/ase/msa/bit-counting/*
source files.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Add tests for MSA logic instructions. This includes following
instructions:
* AND.V - logical AND
* NOR.V - logical NOR
* OR.V - logical OR
* XOR.V - logical XOR
Each test consists of 80 test cases, so altogether there are 320
test cases.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Add wrappers for MSA logic instructions.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Add tests for MSA interleave instructions. This includes following
instructions:
* ILVEV.B - interleave even (bytes)
* ILVEV.H - interleave even (halfwords)
* ILVEV.W - interleave even (words)
* ILVEV.D - interleave even (doublewords)
* ILVOD.B - interleave odd (bytes)
* ILVOD.H - interleave odd (halfwords)
* ILVOD.W - interleave odd (words)
* ILVOD.D - interleave odd (doublewords)
* ILVL.B - interleave left (bytes)
* ILVL.H - interleave left (halfwords)
* ILVL.W - interleave left (words)
* ILVL.D - interleave left (doublewords)
* ILVR.B - interleave right (bytes)
* ILVR.H - interleave right (halfwords)
* ILVR.W - interleave right (words)
* ILVR.D - interleave right (doublewords)
Each test consists of 80 test cases, so altogether there are 1280
test cases.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Add wrappers for MSA interleave instructions.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Add tests for MSA bit counting instructions. This includes following
instructions:
* NLOC.B - number of leading ones (bytes)
* NLOC.H - number of leading ones (halfwords)
* NLOC.W - number of leading ones (words)
* NLOC.D - number of leading ones (doublewords)
* NLZC.B - number of leading zeros (bytes)
* NLZC.H - number of leading zeros (halfwords)
* NLZC.W - number of leading zeros (words)
* NLZC.D - number of leading zeros (doublewords)
* PCNT.B - population count / number of ones (bytes)
* PCNT.H - population count / number of ones (halfwords)
* PCNT.W - population count / number of ones (words)
* PCNT.D - population count / number of ones (doublewords)
Each test consists of 80 test cases, so altogether there are 960 test
cases.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Add a header that contains wrappers around MSA instructions assembler
invocations. For now, only bit counting instructions (NLOC, NLZC, and
PCNT; each in four data format flavors) are supported.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Add a header that contains test utilities. For now, it contains
only a function for checking and printing test results for bit
counting and similar MSA instructions.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
The file tests/tcg/mips/include/test_inputs.h is planned to
contain various test inputs. For now, it contains 64 128-bit
pattern inputs (alternating groups od ones and zeroes) and
16 128-bit random inputs.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Mateja Marjanovic