ths
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42532189df
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Timer start/stop implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3237 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-09-25 16:53:15 +00:00 |
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ths
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ead9360e2f
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Partial support for 34K multithreading, not functional yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-09-06 00:18:15 +00:00 |
|
ths
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fcb4a419f5
|
Choose number of TLBs at runtime, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-04-17 15:26:47 +00:00 |
|
pbrook
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d537cf6c86
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Unify IRQ handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-04-07 18:14:41 +00:00 |
|
ths
|
3529b538ce
|
Fix disabling of the Cause register for R2.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2612 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-04-05 23:17:40 +00:00 |
|
ths
|
39d51eb8bc
|
Fix BD flag handling, cause register contents, implement some more bits
for R2 interrupt handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2493 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-03-18 12:43:40 +00:00 |
|
ths
|
4de9b249d3
|
Reworking MIPS interrupt handling, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-01-24 01:47:51 +00:00 |
|
ths
|
e16fe40c87
|
Move the MIPS CPU timer in a seperate file, by Alec Voropay.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2225 c046a42c-6fe2-441c-8c8c-71466251a162
|
2006-12-06 21:38:37 +00:00 |