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qemu
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478 Commits

Author SHA1 Message Date
aurel32 ca10f86763 Remove osdep.c/qemu-img code duplication 
(Kevin Wolf)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-11 21:35:42 +00:00
ths 53715e48b0 Fix infinite loop when invalidating TLB, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4136 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-29 21:43:23 +00:00
ths d0dc7dc327 Make MIPS MT implementation more cache friendly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3981 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-12 21:01:26 +00:00
bellard 57fec1fee9 use the TCG code generator 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-01 10:50:11 +00:00
ths a139a3ad23 Fix typo which broke MIPS32R2 64-bit FPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3902 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-09 12:03:22 +00:00
ths 6b5435d77c Fix broken absoluteness check for cabs.d.*. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3900 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-08 18:11:08 +00:00
ths b67bfe8d9f Handle some more exception types. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3886 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-04 17:52:57 +00:00
ths 9a5d878f6e Fix exception debug output. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3885 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-03 21:26:23 +00:00
ths b8aa4598e2 MIPS COP1X (and related) instructions, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3877 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-30 15:36:58 +00:00
ths ea4b07f762 Set FCR0.F64 for MIPS64R2-generic, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3865 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-28 12:35:05 +00:00
ths 14e51cc7a4 De-cruft exception definitions, and implement nicer debug output. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3861 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-26 19:34:03 +00:00
ths e9c71dd1c1 Support for VR5432, and some of its special instructions. Original patch 
by Dirk Behme.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3859 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-25 20:46:56 +00:00
ths 29fe0e3490 5K and 20K are Release 1 CPUs. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3858 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-25 17:32:46 +00:00
ths 306ab3e86a Avoid host FPE for overflowing division on MIPS, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3856 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-25 03:18:19 +00:00
ths 6d35524c40 Improved PABITS handling, and config register fixes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3855 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-25 03:13:56 +00:00
ths b352fa43ea Update debug code to match new accumulator register layout. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3853 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-24 16:24:42 +00:00
ths a1daafd8df Fix CCRes value for 20Kc. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3849 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-24 14:33:57 +00:00
ths 0300e3faf6 MIPS TODO: mention unimplemented system controllers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3830 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-17 03:53:42 +00:00
ths bbbe9b8822 Update MIPS TODO. The mipsnet failure is caused by a kernel bug. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3829 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-17 03:50:28 +00:00
ths 01ba98161f Handle cpu_model in copy_cpu(), by Kirill A. Shutemov. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-09 02:22:57 +00:00
ths dab6322b86 Larger physical address space for 32-bit MIPS. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3765 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-02 07:14:17 +00:00
ths ae2dbf7fb0 Micro-optimize back-to-back store-load sequences. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3743 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-26 09:01:34 +00:00
ths 185f07621f Optimize the conventional move operation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3720 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-22 15:10:21 +00:00
ths 67d6abff60 Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3718 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-22 00:34:36 +00:00
ths 8d162c2b68 Add older 4Km variants. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3708 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-19 16:10:33 +00:00
pbrook f090c9d4ad Add strict checking mode for softfp code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-18 14:33:24 +00:00
ths c6d6dd7c74 Fix MIPS64 R2 instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3686 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-18 03:36:07 +00:00
ths 8c89395eeb Use a valid PRid. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3685 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-18 03:19:58 +00:00
pbrook 5747c0733d Fix int/float inconsistencies. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3672 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 14:53:06 +00:00
ths 3e4587d5d1 Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSP 
flags.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3637 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-14 03:11:17 +00:00
bellard aaed909a49 added cpu_model parameter to cpu_init() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-10 15:15:54 +00:00
ths 8f6f6026f1 Use FORCE_RET, scrap RETURN which was implemented in target-specific code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3560 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-09 23:09:41 +00:00
ths 7df526e317 Move kernel loader parameters from the cpu state to being board specific. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3557 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-09 17:52:11 +00:00
ths d26bc2118e Clean out the N32 macros from target-mips, and introduce MIPS ABI specific 
defines for linux-user.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3556 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-08 18:05:37 +00:00
ths 855cea8c92 Formatting fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3554 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-08 16:44:01 +00:00
ths 273af66025 Adjust s390 addresses (the MSB is defined as "to be ignored"). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 14:39:49 +00:00
ths d2123ead89 Preliminary MIPS64R2 mode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3479 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 09:38:43 +00:00
ths 6276c76758 Fix logic bug which broke TLBL/TLBS handling somewhat. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3478 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 02:57:19 +00:00
ths 1b6fd0bc55 Restrict CP0_PerfCnt to legal values. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3476 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 00:49:32 +00:00
ths 623a930ec3 Implement missing MIPS supervisor mode bits. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 19:45:05 +00:00
ths 05f778c8bd Add sharable clz/clo inline functions and use them for the mips target. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3455 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-27 13:05:54 +00:00
ths 5592a750b9 The other half of the mul64 rework. Sorry for the breakage, I committed 
an incomplete version of what I tested.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3454 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-26 22:35:02 +00:00
ths 9f77c1cdcf Remove bogus instruction decode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3433 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-24 00:52:07 +00:00
ths 6ad3872210 Force proper sign extension for mfc0/mfhc0 on MIPS64. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3432 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-24 00:10:32 +00:00
ths 60445285a8 Fix writable length of the index register. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3431 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:58:21 +00:00
ths 7d307e9edc Enforce proper sign extension for lwl/lwr on MIPS64. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3430 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:23:43 +00:00
ths 9278480e8f Fix CLO calculation for MIPS64. And a small code cleanup. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3428 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:22:03 +00:00
ths 7385ac0ba2 Use the standard ASE check for MIPS-3D and MT. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 17:04:27 +00:00
ths d8a5950a62 Switch bc1any* instructions off if no MIPS-3D is implemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3426 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 13:15:33 +00:00
ths 647de6ca24 Handle IBE on MIPS properly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 19:45:44 +00:00
ths c7890fc209 Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3402 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 13:43:58 +00:00
j_mayer 6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
ths d0f48074db Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3383 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-13 19:00:52 +00:00
ths 89fc88da4c Fix off-by-one in address check. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3382 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-13 17:29:09 +00:00
j_mayer c732abe222 Unify '-cpu ?' option. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-12 06:47:46 +00:00
ths aa34373598 Use always_inline in the MIPS support where applicable. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3375 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:39:58 +00:00
ths ab19cb4129 Delete file which should have been removed in the lst commit. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3373 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:17:28 +00:00
ths 4e9f853731 Fix [ls][wd][lr] instructions, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3372 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:12:08 +00:00
ths 540635ba65 Code provision for n32/n64 mips userland emulation. Not functional yet. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-30 01:58:33 +00:00
ths a09d88b86a Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3278 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-30 00:45:51 +00:00
ths 671880e651 Supervisor mode implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3267 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-29 19:21:36 +00:00
ths 544540979c Less magic constants. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3266 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-29 19:19:59 +00:00
ths 418d7c7169 Fix MIPS FP underflow handling, spotted by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3255 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-28 19:30:36 +00:00
ths 198a74de4c Move get_sp_from_cpustate from cpu.h to target_signal.h. 
Enable sigaltstack processing for more architectures.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 16:44:32 +00:00
ths a04e134ad1 linux-user sigaltstack() syscall, by Thayne Harbaugh. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 13:57:58 +00:00
ths 08fa4bab83 hflags computation cleanup, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3243 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-26 23:52:06 +00:00
ths fe253235b2 Wrap a few often used tests with unlikely(), by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3242 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-26 23:50:39 +00:00
ths 42532189df Timer start/stop implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3237 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-25 16:53:15 +00:00
ths 387a8fe505 Optimise instructions accessing CP0, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3235 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-25 14:49:47 +00:00
ths e189e74868 Per-CPU instruction decoding implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-24 12:48:00 +00:00
ths 2337fdc208 Fix mips usermode emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3212 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-23 17:54:29 +00:00
j_mayer c068688b03 Extend TB flags to 64 bits (Alexander Graf). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3198 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-20 22:47:42 +00:00
ths 3b46e62427 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-17 08:09:54 +00:00
ths 5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
ths ce62e5ba09 Fix tb->size mishandling, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-11 10:04:58 +00:00
ths ead9360e2f Partial support for 34K multithreading, not functional yet. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-06 00:18:15 +00:00
ths 3ddf0b5cde Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3146 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-08-26 17:37:23 +00:00
ths ae5d8053a1 Fix MIPS cache configuration, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3092 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-29 22:11:46 +00:00
ths 475d91106d Update TODO list. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3057 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-11 10:25:04 +00:00
ths 5e4ef64cfd Simplify round/ceil/floor implementation, spotted by Fabrice Bellard. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3031 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-28 14:07:05 +00:00
ths e3b60f1d9e Fix computation for ceil, floor and round instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3028 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-27 19:01:46 +00:00
ths 8dfdb87c8d Implement recip1/recip2/rsqrt1/rsqrt2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3026 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-26 20:26:03 +00:00
ths 996ba2ccf5 MIPS64 improvements, based on a patch by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3021 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-25 17:34:33 +00:00
ths e034e2c39a Handle MIPS64 SEGBITS value correctly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-23 18:04:12 +00:00
ths 17044c06b8 Allow emulation of 32bit targets in the MIPS64 capable qemu version. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3007 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-22 23:50:19 +00:00
ths 7bfd934a13 Fix write to K0 bits in Config0, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3006 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-22 11:50:17 +00:00
ths bd04c6feb9 Change 20Kc PRID to a later version. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2980 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-12 12:43:47 +00:00
ths 70cf0b63f1 R5k has PX implemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2963 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-09 12:29:32 +00:00
ths 9467d44c4d Move target-specific defines to the target directories. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-03 21:02:38 +00:00
ths bfed01fc79 Clean up of some target specifics in exec.c/cpu-exec.c. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-03 17:44:37 +00:00
ths 3a95e3a7d9 Check for R2 instructions, and throw RI if we don't emulate R2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2921 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-02 00:25:12 +00:00
ths 1e3d0552f5 Update some comments, 64bit FPU support is functional regardless of 
funny non-standard fcr0 bits on earlier CPUs.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2919 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 21:57:32 +00:00
ths 8487327a1d Make sure hflags are updated for CP0_Status changes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2918 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 17:47:07 +00:00
ths c13af1ef6c Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2911 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 15:18:04 +00:00
ths c9c1a06457 Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno. 
Note that the F64 flag isn't usable on any of those (and the R4000),
so all our 64bit FPU goodness goes out of the window until a shadow
capability flag is implemented. :-(


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2910 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 14:58:56 +00:00
ths a7037b2950 Allow again FPU for usermode emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2905 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 11:47:24 +00:00
ths 278d070272 Simplify code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2904 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 23:42:46 +00:00
ths 33ac7f1630 Don't kill the registered irqs on reset. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2903 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 16:18:58 +00:00
ths 924b2c07cd Add proper float*_is_nan prototypes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2902 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 16:17:52 +00:00
ths 51b2772f28 Fix CPU (re-)selection on reset. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-30 20:46:02 +00:00
ths 78749ba859 Fix usermode check, thanks Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2897 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-29 18:55:34 +00:00
ths 5e755519ac Don't check the FPU state for each FPU instruction, use hflags to 
handle this per-tb.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-29 16:52:57 +00:00
ths 6e473128b6 Handle PX/UX status flags correctly, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2892 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 20:36:48 +00:00
ths 12a4b2aa1d Fix ddivu for 32bit hosts, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2890 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:36:30 +00:00
ths c811cf2c03 Do not sign extend lwu, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2889 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:09:41 +00:00
ths 9b9e4393dd MIPS64 addressing fixes, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2888 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:03:28 +00:00
ths fd88b6abab The 24k wants more watch and srsmap registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2849 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:24:25 +00:00
ths df1561e22d The previous patch to make breakpoints work was a performance 
disaster, use a similiar hack as ARM does instead.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2848 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:18:27 +00:00
ths 3a5b360dac Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2841 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-20 13:27:58 +00:00
ths 93b12ccc62 Fix indexed FP load/store instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2837 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-20 01:36:29 +00:00
ths 57fa1fb31c More MIPS 64-bit FPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 20:29:41 +00:00
ths f469b9db01 Fix slti/sltiu for MIPS64, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2833 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 17:45:43 +00:00
ths 5d46d55d4b Fix ldl/ldr implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2832 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 17:44:33 +00:00
ths fd4a04ebb2 - Move FPU exception handling into helper functions, since they are big. 
- Fix FP-conditional branches.
- Check FPU register mode at runtime, not translation time, as the F64
  status bit can change.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 11:55:54 +00:00
ths 34ae7b51f5 Work around the lack of proper handling for self-modifying code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2827 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 01:13:09 +00:00
ths 69d357286d More generic 64 bit multiplication support, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-16 11:59:40 +00:00
ths 100ce98812 Full MIPS64 MMU implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2820 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 19:22:13 +00:00
ths f1b0aa5de7 Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2819 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 18:39:10 +00:00
ths 7b62f20c08 Delete misleading comment. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2814 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 15:29:26 +00:00
ths 703eaf379e Don't decode CP0 XContext on 32bit MIPS. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2812 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 14:42:18 +00:00
ths f2e9ebef12 MMU code improvements, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2811 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 14:07:26 +00:00
ths 388bb21af6 MIPS linux-user update. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2810 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 13:58:00 +00:00
ths 29929e3490 MIPS TLB style selection at runtime, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 13:49:44 +00:00
ths 5a1e8ffbe7 Implemented cabs FP instructions, and improve exception handling for 
trunc/floor/ceil/round.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2804 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 17:08:26 +00:00
ths 287c4b84f4 Another bit of nicer debug output. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2803 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 10:43:55 +00:00
ths fbcc68286a Implement FP madd/msub, wire up bc1any[24][ft]. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2802 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 09:59:10 +00:00
ths 923617a396 Improved debug output for the MIPS opcode decoder. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2801 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 00:16:06 +00:00
ths 4759513bd9 Fix missing status ro mask initialization, thanks Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2800 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 00:02:14 +00:00
ths beebb570f4 Fix for the scd instruction, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2799 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-10 00:51:01 +00:00
ths b4ab4b4e1b Preliminary MIPS 64-bit MMU implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2794 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-09 09:34:30 +00:00
ths a6763a5881 Fix MIPS64 address computation specialcase, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2793 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-09 09:33:33 +00:00
ths 09c69c5b23 Work around gcc's mips define, spotted by Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2786 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-08 20:51:26 +00:00
ths 5a5012ecbd MIPS 64-bit FPU support, plus some collateral bugfixes in the 
conditional branch handling.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-07 13:55:33 +00:00
ths 8b4af70527 Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2778 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-07 12:52:18 +00:00
ths 0a6de75002 Clear BD slot on next exception if appropriate. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2777 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-07 12:46:25 +00:00
ths 9aca99a06d Fix a really stupid bug in the [ls]d[lr] emulation, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2773 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-05 20:13:13 +00:00
ths 01179c382b Kill broken host register definitions, thanks to Paul Brook and Herve 
Poussineau for debugging this.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2747 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-29 21:26:37 +00:00
ths c631c88cee Revert last checkin. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2746 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-29 21:19:03 +00:00
ths bc8191fce9 Hopefully the final fix for LUI sign extensions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2745 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-29 20:13:19 +00:00
ths 509b8ab2cc Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2739 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-28 21:44:04 +00:00
ths d6929309b6 Next attempt to get the lui sign extension right. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2727 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-25 16:41:11 +00:00
ths 7bc45061ee Fix lui sign extension. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2726 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-25 13:58:52 +00:00
ths 19221bdaf8 Update comment. We can't easily adhere to the architecture spec because 
it would involve counting the actually executed instructions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2708 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-19 16:35:09 +00:00
ths fcb4a419f5 Choose number of TLBs at runtime, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-17 15:26:47 +00:00
ths 9898128f55 Simplify branch likely handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2676 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-16 01:35:29 +00:00
ths 171b31e7c7 Don't use T2 for INS, it conflicts with branch delay slot handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2674 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 21:26:37 +00:00
ths 80c27194a7 Fix qemu SIGFPE caused by division-by-zero due to underflow. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2673 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 21:21:33 +00:00
ths a85427b147 Small code generation optimization. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2672 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 19:52:12 +00:00
ths fff739ccd5 Delete unused define. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2671 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 17:27:07 +00:00
ths 16c00cb2c2 Restart interrupts after an exception. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2664 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-14 12:56:46 +00:00
ths 744e091596 Nicer Log formatting. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2659 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 22:30:36 +00:00
ths e58c8ba5f6 Another fix for CP0 Cause register handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2658 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 20:17:54 +00:00
ths 2f6445458e Make SYNCI_Step and CCRes CPU-specific. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2651 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 20:34:23 +00:00
ths b48cfdffd9 Throw RI for invalid MFMC0-class instructions. Introduce optional 
MIPS_STRICT_STANDARD define to adhere more to the spec than it makes
sense in normal operation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2650 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:24:14 +00:00
ths 2423f6601a Code formatting fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2649 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:15:08 +00:00
ths 534ce69ff0 More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may 
end up empty for 32bit mips, which dyngen trips over.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2648 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:13:00 +00:00
ths c090a8f440 Fix CP0_IntCtl handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2645 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:17:31 +00:00
ths c50da3df61 Proper handling of reserved bits in the context register. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2644 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:16:30 +00:00
ths 4e7a4a4e84 Mark watchpoint features as unimplemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2643 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:15:41 +00:00
ths 62c5609aa5 Catch unaligned sc/scd. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2642 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:14:21 +00:00
ths 97428a4d84 Fix exception handling cornercase for rdhwr. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2641 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:13:40 +00:00
ths dac9321024 Remove bogus mtc0 handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2640 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 12:31:31 +00:00
pbrook d537cf6c86 Unify IRQ handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 18:14:41 +00:00
j_mayer 9b3c35e0e6 cpu_get_phys_page_debug should return target_phys_addr_t 
instead of target_ulong to be consistent.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 11:21:28 +00:00
ths e0c84da78c Implement prefx. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2630 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:11:39 +00:00
ths cbeb0857da Set proper BadVAddress value for unaligned instruction fetch. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:11:15 +00:00
ths e04bcc691b Actually skip over delay slot for a non-taken branch likely. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2628 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:10:22 +00:00
ths f757d6ff29 Fix ins/ext cornercase. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2627 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:09:17 +00:00
ths beb811bdd6 Fix handling of ADES exceptions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2623 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 19:31:06 +00:00
ths f41c52f170 Save state for all CP0 instructions, they may throw a CPU exception. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2622 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 18:46:01 +00:00
ths c53f4a62e3 fix branch delay slot cornercases. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2615 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:21:37 +00:00
ths 5a63bcb2d2 Fix rotr immediate ops, mask shift/rotate arguments to their allowed 
size.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2614 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:20:05 +00:00
ths acd858d91f Handle EBase properly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2613 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:18:13 +00:00
ths 1579a72ec5 Fix RDHWR handling. Code formatting. Don't use *_direct versions to raise 
exceptions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2611 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:16:25 +00:00
ths f7cfb2a176 64bit MIPS FPUs have 32 registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2610 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:14:23 +00:00
ths 876d4b0783 Fix code formatting. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2595 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-04 21:07:17 +00:00
ths 38121543c7 MIPS32R2 needs RDPGPR/WRPGPR instructions even when no shadow registers 
are implemented.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2589 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-02 17:28:07 +00:00
ths 2d0e944d1c Build fix for 64bit machines. (This is still not correct mul/div handling.) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2587 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-02 15:54:05 +00:00
ths 60aa19abef Actually enable 64bit configuration. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-01 12:36:18 +00:00
ths fbe4f65b28 MIPS64 configurations. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2564 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-01 11:16:48 +00:00
ths a4bc3afc09 Malta CBUS UART support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-31 16:54:14 +00:00
ths 7246bb21ba Update mips TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2549 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 18:56:19 +00:00
ths 36bb244bd3 Fix typo, suggested by Ben Taylor. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2548 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 18:42:21 +00:00
ths 5efbfeddac Squash logic bugs while they are fresh... 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2547 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 17:48:00 +00:00
ths 24c7b0e330 Sanitize mips exception handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 16:44:54 +00:00
ths 34ee2edebb One more bit of mips CPU configuration, and support for early 4KEc 
which implemented only MIPS32R1. Thanks to Stefan Weil to insist he's
right on that. :-)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2533 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-24 23:36:18 +00:00
ths e397ee3382 Fix enough FPU/R2 support to get 24Kf going. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-23 00:43:28 +00:00
ths 3953d78687 Move mips CPU specific initialization to translate_init.c. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-21 11:04:42 +00:00
ths 3ad4bb2d3d Barf on branches/jumps in branch delay slots. Spotted by Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2513 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 22:15:30 +00:00
ths 820e00f252 Define gen_intermediate_code_internal as "static inline". 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2512 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 21:46:06 +00:00
ths 8294eba187 SPARC host fixes, by Ben Taylor. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 14:47:40 +00:00
ths 39d51eb8bc Fix BD flag handling, cause register contents, implement some more bits 
for R2 interrupt handling.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2493 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-18 12:43:40 +00:00
ths 33d68b5f00 MIPS -cpu selection support, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-18 00:30:29 +00:00
ths 60a9f9ecd9 Note FPU enable/disable issue. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2489 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-17 15:39:48 +00:00
ths 6f5b89a07c MIPS Userland TLS register emulation, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2465 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-02 20:48:00 +00:00
ths 36d2395873 MIPS FPU dynamic activation, part 1, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-28 22:37:42 +00:00
ths 00a709c7b9 Fix mips FPU emulation, 32 bit data types are allowed to use odd registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2454 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-27 19:27:51 +00:00
ths 3594c77487 Replace TLSZ with TARGET_FMT_lx. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2444 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-20 23:37:21 +00:00
ths 925fd0f202 Fix sign-extension of VPN field in TLB, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2433 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-18 00:19:08 +00:00
ths 4a109bfbca Update MIPS TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2378 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-02 02:56:33 +00:00
ths 01d6a890b4 Sparc arm/mips/sparc register patch, by Martin Bochnig. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2377 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-02 01:03:34 +00:00
ths b29a0341d7 EBase is limited to KSEG0/KSEG1 even on 64bit CPUs. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2351 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-24 18:01:23 +00:00
ths 4de9b249d3 Reworking MIPS interrupt handling, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-24 01:47:51 +00:00
ths 9c2149c8e0 Implementing dmfc/dmtc. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2348 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-23 22:45:22 +00:00
ths 81e1e20979 Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2346 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-22 20:57:17 +00:00
ths 3b1c8be4f4 Fix PageMask handling, second part. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2345 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-22 20:50:42 +00:00
ths 72f341ed1e TLB address wraparound hopefully fixed now. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2342 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-21 03:13:58 +00:00
ths bc814401c2 Bring TLB / PageSize handling in line with real hardware behaviour. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2341 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-21 03:12:25 +00:00
ths 15dcf5aa86 Note more issues. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2335 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-19 17:56:23 +00:00
ths 2c52c8169a Keep track of mips related issues. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2325 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-17 20:03:15 +00:00
bellard 2ee4aed86f moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppressed invalid tb_invalidate_page_range() calls 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2287 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-03 15:18:08 +00:00
ths 0feef828e1 Fix bad data type. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2284 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-01 20:35:21 +00:00
ths 3a3f24fce8 Fix lwl/lwr for 64bit emulation, also debug output spec for 64bit emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2283 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-01 20:34:37 +00:00
ths 7495fd0f4a Simplify code and fix formatting. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2282 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-01 20:32:08 +00:00
ths 9042c0e20d Check ELF binaries for machine type and endianness. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2274 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-23 14:18:40 +00:00
ths 70ead43412 Use memory barriers in FORCE_RET / RETURN. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2273 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-23 00:49:32 +00:00
ths 5dc4b74480 Scrap SIGN_EXTEND32. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2251 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-21 13:48:28 +00:00
ths c570fd169c Preliminiary MIPS64 support, disabled by default due to performance impact. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-21 01:19:56 +00:00
ths 179e32bbcc Fix erraneous fallthrough in MIPS trap implementation, thanks Atsushi Nemoto. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2247 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-16 16:45:18 +00:00
ths ca7c2b1b9f Handle invalid accesses as SIGILL for mips/mipsel userland emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2235 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-10 22:08:10 +00:00
ths 71fb7241c6 Fix build of MIPS target without FPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2233 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-07 20:07:37 +00:00
ths aa328addc0 Fix reset handling, CP0 isn't enabled by default (a fact which doesn't 
matter when running in kernel space).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2228 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-07 16:22:15 +00:00
ths e144966416 Simplify mask construction. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2227 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-07 00:30:19 +00:00
ths bb8a53ad91 Update copyright notice. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2226 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 23:12:49 +00:00
ths 7a387fffce Add MIPS32R2 instructions, and generally straighten out the instruction 
decoding. This is also the first percent towards MIPS64 support.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 20:17:30 +00:00
ths 8c0fdd856c Dynamically translate MIPS mtc0 instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2223 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 18:19:33 +00:00
ths 873eb01234 Dynamically translate MIPS mfc0 instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2222 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:59:07 +00:00
ths 6ae817752b Halt/reboot support for Linux, by Daniel Jacobowitz. This is a band-aid 
until we emulate real MIPS hardware with real firmware.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2221 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:48:52 +00:00
ths 814b9a4749 MIPS TLB performance improvements, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:42:40 +00:00
pbrook 417f38f066 MIPS FPU fixes (Daniel Jacobowitz). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2213 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-11-12 23:54:39 +00:00
pbrook 483dcf538e Avoid redundant TLB flushes (Daniel Jacobowitz). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2211 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-11-12 20:55:05 +00:00
bellard 569f5d668c compilation fix 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2205 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-10-29 15:10:09 +00:00
bellard dd016883fb add support for cvt.s.d and cvt.d.s (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2198 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-10-23 21:25:11 +00:00
bellard 3e382bc84c consistent update of ERL and EXL 
(Dirk Behme)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2028 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-26 20:29:47 +00:00
bellard d796321b6b lwu support - generate exception if unaligned pc (Marius Groeger) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2025 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-26 20:02:45 +00:00
bellard fdbb46910a Solaris/SPARC host port (Ben Taylor) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1979 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 17:32:25 +00:00
bellard 43057ab127 use constants for TLB handling (Thiemo Seufer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1978 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 17:15:19 +00:00
bellard c5d6edc3fc mips config fixes (initial patch by Stefan Weil) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1977 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 16:49:24 +00:00
bellard 6ea83fedc8 MIPS FPU support (Marius Goeger) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 12:56:19 +00:00
bellard ba9a74dae0 fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1937 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-05-22 22:14:43 +00:00
bellard 3d9fb9fefe cosmetics (Thiemo Seufer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1936 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-05-22 22:13:29 +00:00
bellard 9d05095e5f mips cleanup (Thiemo Seufer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1934 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-05-22 22:03:52 +00:00
bellard f9ebe432db removed unnecessary header 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1835 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-04-23 18:18:10 +00:00
bellard ce2f4b3cb9 MIPS single stepping fix (Dirk Behme) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1830 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-04-23 15:23:48 +00:00
bellard cd7dd10f09 MIPS CP0 not usable in kernel mode (Stefan Weil) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1829 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-04-23 15:21:24 +00:00
bellard 76e050c2e6 Fix overflow conditions for MIPS add / subtract (Stefan Weil) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1828 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-04-23 15:18:58 +00:00
pbrook 09c56b842e Avoid flushing of global TLB entries for differing ASIDs (Thiemo Seufer). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1778 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-03-11 16:39:23 +00:00
pbrook ecd78a0ac7 Clear MIPS_HFLAG_BMASK for ErrorEPC (Thiemo Seufer). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1777 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-03-11 16:35:30 +00:00
pbrook 56b194039e Rename MIPS_HFLAG(S)_TMASK (Thiemo Seufer). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1775 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-03-11 16:23:39 +00:00
pbrook 98c1b82b6c e bitfields in mips TLB structures (Thiemo Seufer). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1774 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-03-11 16:20:36 +00:00