e18231a3ff
Show size for unassigned accesses (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-06 18:46:28 +00:00
f4b1a842d7
Rearrange tick functions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5408 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-03 19:04:42 +00:00
48585ec51d
Fix missing prototype warnings by moving declarations
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5407 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-03 19:02:42 +00:00
9827e450e4
Fix MXCC printf warning (based on patch by Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5393 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02 18:06:50 +00:00
cc6747f4c9
Add mmu tlb demap support (Igor Kovalenko)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5332 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-27 19:43:18 +00:00
e87231d426
Add a generic Niagara machine
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5329 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 19:48:58 +00:00
c99657d303
Implement some UA2007 block ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5328 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:07:24 +00:00
b158a785d2
Implement UA2005 hypervisor traps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:05:23 +00:00
d81fd7220e
Move also DEBUG_PCALL (see r5085)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5326 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:02:48 +00:00
9d92659858
Add software and timer interrupt support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 19:50:28 +00:00
1121f87961
Fix arguments used in cas/casx, thanks to Igor Kovalenko for spotting
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5296 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 16:52:28 +00:00
ab508019a1
Use the new concat_tl_i64 op for std and stda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5283 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 18:43:17 +00:00
a7ec422912
Use the new concat_i32_i64 op for std and stda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 14:49:09 +00:00
f0d5e47183
Move signal handler prototype back to cpu.h
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5276 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20 09:05:49 +00:00
9f4576f08b
Fix array subscript above array bounds error
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5219 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14 19:16:21 +00:00
72ccba795b
Fix mulscc with high bits set in either src1 or src2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5201 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-13 17:20:52 +00:00
5068cbd9e9
Write zeros to high bits of y, based on patch by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5196 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-11 16:01:02 +00:00
d84763bc17
Convert rest of ops using float32 to TCG, remove FT0 and FT1
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 20:09:22 +00:00
c5d04e99f3
Partially convert float128 conversion ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 20:00:18 +00:00
e2ea21b396
Convert basic 64 bit VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:57:35 +00:00
1d01299d29
Convert basic 32 bit VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5190 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:57:13 +00:00
714547bbc7
Convert basic float32 ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5189 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:54:51 +00:00
3a3b925d47
Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-09 19:02:49 +00:00
510aba20f0
Fix a typo in fpsub32
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5177 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:54:01 +00:00
255e1fcb5a
Convert most env fields to TCG registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5176 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:51:43 +00:00
47ad35f16a
Silence gcc warning about constant overflow
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:50:16 +00:00
e83ce55068
Implement no-fault loads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5148 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03 17:32:10 +00:00
b991c38519
Fix sign extension problems with smul and umul (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5138 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:33:23 +00:00
105a1f04b5
Fix y register loads and stores
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5123 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 19:35:29 +00:00
c8f9349ad9
Remove memcpy32() prototype leftover from r5109
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5114 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:22:10 +00:00
ba6a9d8cda
Fix FCC handling for Sparc64 target, initial patch by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 21:03:31 +00:00
91736d378b
Fix Sparc64 boot on i386 host:
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- move do_interrupt() back to op_helper.c
- move non-helper prototypes from helper.h to exec.h
- move some prototypes from cpu.h to exec.h
- do not export either set_cwp() or cpu_set_cwp() from op_helper.c,
but instead provide inline functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 20:50:21 +00:00
7621a90da8
Fix udiv and sdiv on Sparc64 (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5085 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-25 19:43:53 +00:00
c93e7817ee
Fix wrwim masking (Luis Pureza)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5043 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 17:34:42 +00:00
5578ceab94
Use initial CPU definition structure for some CPU fields instead of copying
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them around, based on patch by Luis Pureza.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 17:33:42 +00:00
2ae72bce02
Correct 32bit carry flag for add instruction (Igor Kovalenko)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5017 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 08:33:47 +00:00
06057e6f6c
Fix faligndata (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4992 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 19:50:16 +00:00
43e9e742b9
Fix I/D MMU tag reads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4991 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 18:16:08 +00:00
01b1fa6d16
Fix Sparc64 shifts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4990 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 18:13:54 +00:00
95f9397c75
Fix offset handling for ASI loads and stores (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4988 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 15:28:20 +00:00
a7a044f29e
Handle wrapped registers correctly when saving
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Fix typo
Save and load interrupt_index and pil_in
Original patch by Luis Pureza
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4980 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-01 15:13:58 +00:00
dd5e6304aa
Fix cmp/subcc/addcc op bugs reported by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4970 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-29 18:11:20 +00:00
c19148bd8f
Make MAXTL dynamic, bounds check tl when indexing
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4942 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-25 07:42:14 +00:00
0b8f1b102b
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4938 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-24 11:28:51 +00:00
c7ba218da1
Add T1 and T2 CPUs, add a Sun4v machine
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4923 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-22 07:07:34 +00:00
74b9decc47
Use MMU globals for some MMU traps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4918 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-21 18:43:32 +00:00
8eba209e33
Fix reset vector
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4917 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-21 11:17:23 +00:00
f76981b113
Print default and available CPU features separately
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4912 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-20 18:23:50 +00:00
fb79ceb91a
Make UA200x features selectable, add MMU types
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-20 18:22:16 +00:00
7f626233a0
Remove unused variable
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4908 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19 18:35:29 +00:00
db166940e2
Implement nucleus quad ldda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4902 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19 13:25:28 +00:00
f617a9a6bb
Update TLB miss addresses
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4897 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19 10:04:48 +00:00
2cfc5f17d3
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 18:01:29 +00:00
8d7d8c4bb1
wrhpr hstick_cmpr is a store, not a load
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4887 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 10:26:07 +00:00
e6bf7d70b5
Fix saving and loading of trap state
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4883 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-17 19:17:19 +00:00
2cade6a3f6
Support for address masking
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4882 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-17 12:53:05 +00:00
a5a52cf246
Fix MMU registers, add more E-cache ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4881 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-16 16:58:49 +00:00
e19e4efeaa
Fix MMU miss traps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4880 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-16 16:55:52 +00:00
c5f2f66835
Flushw can generate exceptions, so save PC & NPC
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4876 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-16 11:51:15 +00:00
71817e4898
Really fix cas
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4869 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-15 14:52:09 +00:00
f7350b47da
Implement some Ultrasparc cache ASIs used by SILO
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4858 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-08 15:51:32 +00:00
9656f324d2
Move interrupt_request and user_mode_only to common cpu state.
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Save and restore env->interrupt_request and env->halted.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-01 20:01:19 +00:00
b3c7724cbc
Move CPU save/load registration to common code.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 16:31:04 +00:00
2e70f6efa8
Add instruction counter.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 01:03:05 +00:00
a37ee56cb7
Fix bogus format, reading uninitialised memory (original patch by Julian Seward)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4793 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-26 18:43:24 +00:00
a764a566be
Fix Sparc mmu bug seen with NetBSD, based on patch by Cliff Wright
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4785 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-24 19:08:28 +00:00
0bbd4a0ddb
Fix compiler warning (Jan Kiszka)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4781 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-23 16:58:04 +00:00
d987963aa9
Eliminate cpu_T[0]
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4776 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-22 10:58:57 +00:00
3f0436fe85
Eliminate cpu_T[1]
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4775 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-22 08:52:58 +00:00
c0b5b109a8
Add missing keys, sendkey support for all keys
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4774 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-22 07:45:42 +00:00
ece43b8d06
Convert some cpu_dst uses (with loads/stores) to cpu_tmp0
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4772 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-21 19:50:10 +00:00
5c6a0628b7
Avoid brcond problems, use temps for cpu_src1 & cpu_src2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4771 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-21 19:46:48 +00:00
fd07bef4b4
Update TODO
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4765 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-20 17:42:20 +00:00
9fac3a3a7e
Fix boot problem on i386 host introduced in r4690
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4758 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-20 15:06:42 +00:00
07bf2857b8
Avoid temporary variable use across basic blocks for udivx
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4744 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-15 18:06:39 +00:00
1a14026e11
Allow NWINDOWS selection (CPU feature with model specific defaults)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07 08:07:37 +00:00
b5154bdedb
Add more SuperSparcs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4633 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-31 11:33:20 +00:00
f8ed7070ea
Fix typo.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 17:54:15 +00:00
6e68e076e7
Move clone() register setup to target specific code. Handle fork-like clone.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 17:22:15 +00:00
e30b467893
MicroSparc I didn't have fsmuld op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4618 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 18:20:36 +00:00
75d0187a52
Remove unused (for now) reg_REGWPTR (original patch by Glauber Costa)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4617 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 16:38:41 +00:00
9133e39b84
Push common interrupt variables to cpu-defs.h (Glauber Costa)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 10:08:06 +00:00
ce5232c5c2
moved halted field to CPU_COMMON
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 17:14:10 +00:00
2ea815cac7
Free temps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4591 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27 19:39:12 +00:00
f2bc7e7fa1
Move non-op functions from op_helper.c to helper.c and vice versa.
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Rearrange interrupt handling to match other targets.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4590 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27 17:35:30 +00:00
8d96d20941
More TCG type fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4589 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-26 19:42:42 +00:00
ef28fd8673
Fix cas on i386
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4587 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-26 17:53:41 +00:00
4f7de37327
remove absolete function
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4579 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:01:40 +00:00
a8c768c069
Nicer debug output
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4573 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 11:17:46 +00:00
9b7b85d260
Fix off-by-one unwinding error.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 00:36:06 +00:00
bcb0126ff4
More TCGv type fixes.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:24:25 +00:00
cb63669a54
Fix ARM conditional branch bug.
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Add tcg_gen_brcondi.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:22:00 +00:00
455f900486
Fix helper operand type mismatch.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4551 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:12:32 +00:00
c9e03d8f68
Register op helpers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4534 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 18:16:25 +00:00
a4e7dd5267
Remove currently unnecessary alignment masking
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4505 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 19:36:22 +00:00
e35298cd1f
Generate better code for Sparc32 shifts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4467 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 09:43:12 +00:00
79c638586e
Update TODO
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4464 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 06:08:15 +00:00
4da450e616
Move prototype back to avoid a compiler warning
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4443 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 17:59:14 +00:00
77f193daa8
Wrap long lines
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 16:13:33 +00:00
c2bc0e3880
Remove someexplicit alignment checks (initial patch by Fabrice Bellard)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4431 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-11 19:24:10 +00:00
c5adf6a88d
Remove duplicated field
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4411 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 12:25:46 +00:00
0dcda9be6b
Add a TODO file
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4410 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 12:09:24 +00:00
7c60cc4bca
suppressed fixed registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:58:20 +00:00
22548760ca
Fix compiler warnings
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:12:00 +00:00
64a88d5d3a
CPU feature selection support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-09 20:13:43 +00:00
0828b4485a
Move #include to speed up compilation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4398 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-09 20:12:09 +00:00
9c6c6662d1
Simplify some constant loads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4383 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-07 18:04:29 +00:00
ba28189bac
Fix potential condition code problems
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4382 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-07 18:03:02 +00:00
8dd3dca351
remove target ifdefs from vl.c
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(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 13:11:44 +00:00
762abf6774
Complete the TCG conversion (and delete some files, too)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4324 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 12:00:16 +00:00
7fa76c0bf3
Complete the TCG conversion
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 11:58:45 +00:00
653ccb8099
Avoid some brconds
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4318 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 08:06:33 +00:00
6f551262b3
Use memory based registers in functions containing brconds
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4311 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03 20:51:00 +00:00
d2856f1ad4
Factorize code in translate.c
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(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28 00:32:32 +00:00
4b8b8b76d4
Document the shift values
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4243 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-23 17:12:35 +00:00
4e14008f3a
Revert the previous patch
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4236 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22 19:05:18 +00:00
25bc827cf2
Move 128-bit float emulation under linux-user
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4234 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22 16:42:40 +00:00
ca10f86763
Remove osdep.c/qemu-img code duplication
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(Kevin Wolf)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 21:35:42 +00:00
2a39bc41cb
Remove incorrect discards and old unused defines (blueswir1).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4137 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-30 19:47:23 +00:00
a49d9390d4
Change handling of source 2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4135 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 20:39:41 +00:00
9322a4bf0b
Change handling of source register 1
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4134 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 20:38:35 +00:00
c48fcb4751
Move CPU stuff unrelated to translation to helper.c
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4133 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 15:46:56 +00:00
6ae20372d4
Rename T[012] according to their roles
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4131 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 09:09:25 +00:00
32b6c8125c
Avoid writes to T1 except for loads/stores, convert some T0 uses to cpu_tmp0
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4130 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 09:03:48 +00:00
31741a27fa
Accidentally dropped one change from previous commit
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4129 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 08:59:48 +00:00
4af984a76a
Concentrate cpu_T[012] use to one function
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4110 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-26 20:47:52 +00:00
ce5b3c3d46
Split icc and xcc flag calculations
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4109 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-26 20:45:56 +00:00
2f5680ee33
Remove some legacy definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4108 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-26 20:45:06 +00:00
bdf46ea256
Fix a sign extension problem
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4105 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-24 17:47:03 +00:00
7127fe84e7
Fix mulscc
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4103 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-23 11:50:28 +00:00
ce8536e23f
Convert ldf/ldfsr and stf/stfsr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4101 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-22 08:47:14 +00:00
8911f5019c
Fix i32/i64/TL mismatches
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4100 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-22 08:40:28 +00:00
c6d5231deb
Remove leftover definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4098 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 18:31:43 +00:00
2b29924f8c
Convert align checks to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4097 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 18:08:59 +00:00
06b3e1b3a9
Convert jumps to labels to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4094 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:59:39 +00:00
72a9747b79
Convert save, restore, saved, restored, and flushw to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4092 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:57:29 +00:00
44e7757c2a
Convert other float and VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4091 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:56:02 +00:00
ff07ec8309
Convert float move ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4090 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:53:56 +00:00
3b89f26c11
Convert udiv and sdiv ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4088 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:10:42 +00:00
2483386a6e
Use ext_i32_i64 instead of ext32s_i64
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4087 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:09:27 +00:00
d35527d9f9
Convert CCR and CWP ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4086 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:08:25 +00:00
1f5063fb97
Convert array8/16/32 and alignaddr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4085 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:06:54 +00:00
8879d139bb
Convert umul and smul to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4077 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:24:42 +00:00
48d5c82bcc
Use a TCG global for pc and npc
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4076 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:23:31 +00:00
d9bdab86e8
Convert mulscc to TCG, add cc_src2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4075 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:22:18 +00:00
0425bee563
Discard unused data, use less temps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4073 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:18:54 +00:00
87e92502c6
Use a TCG global for fsr
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4068 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15 18:12:11 +00:00
bb5529bb62
Convert ldfsr and stfsr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4067 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15 18:11:06 +00:00
748b9d8ef0
Eliminate some uses of T2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4065 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 21:09:15 +00:00
1a7b60e727
Convert udivx and sdivx to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4064 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 19:42:42 +00:00
f5069b26a4
Use memory globals for G registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4062 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 17:35:02 +00:00
1ec6d2ea99
Use tcg_const_tl for zero constant
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4054 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-13 20:47:53 +00:00
dc99a3f2e8
Convert condition code changing versions of add, sub, logic, and div to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4052 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-13 20:45:31 +00:00
db4a4ea4ee
Use a TCG global for regwptr
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4038 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-11 20:59:02 +00:00
56ec06bb8e
Convert andn, orn and xnor to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4030 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-09 20:46:51 +00:00
19f329ad7b
Convert branches and conditional moves to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4028 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-08 21:36:50 +00:00
134d77a14b
Convert exception ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-06 20:09:54 +00:00
a3ffaf3060
Fix microSPARC II SFSR mask (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4021 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-06 16:13:51 +00:00
375ee38b4b
Convert Sparc64 trap state ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-05 17:59:48 +00:00
7e8c2b6ca8
Convert float helpers to TCG, fix fabsq in the process
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-04 20:00:18 +00:00
dcf2490568
Convert fmovr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4013 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-04 19:56:06 +00:00
ccd4a21937
Convert tick operations to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4011 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:28:06 +00:00
00f219bf50
Convert movr and (partially) movcc to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4010 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:25:27 +00:00
38bc628b08
Convert addx, subx, next_insn and mov_pc_npc to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4009 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:22:19 +00:00
b25deda7ca
Temporary fix for i386 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3994 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-27 17:44:03 +00:00
1a2fb1c009
Modify Sparc32/64 to use TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-24 14:10:06 +00:00
9e31b9e28a
Fix remote debugger memory access problems reported by Matthias Stein
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3982 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-14 17:46:44 +00:00
3deaeab717
Sparc32 MMU register fixes (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-11 18:27:33 +00:00
57fec1fee9
use the TCG code generator
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
045380be94
More ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3882 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-01 17:07:39 +00:00
0b09be2b2f
Nicer debug output for exceptions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3878 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-30 17:13:01 +00:00
7d85892b9b
Initial support for Sun4d machines (SS-1000, SS-2000)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3869 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-28 20:57:43 +00:00
8543e2cfce
Improved ASI debugging (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3868 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-28 18:50:23 +00:00
3aa662faae
Enforce context table alignment
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3857 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-25 07:49:10 +00:00
66f1cdbde4
Partial fix to Sparc32 Linux host global register mangling problem
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3806 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-11 19:39:25 +00:00
666c87aa3b
Add ASIs (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3801 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-10 19:58:20 +00:00
01ba98161f
Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09 02:22:57 +00:00
58a770f3a4
Increase prom size for boot mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3748 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-29 17:08:01 +00:00
3ebf5aafe5
Use slavio base as boot prom address, rearrange sun4m init code
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3747 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-28 20:54:33 +00:00
9c2b428ee1
Fix compilation and warnings on PPC host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3746 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-28 18:08:28 +00:00
2382dc6b9b
Fix floating point register decoding
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3742 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 20:27:35 +00:00
1f58732916
128-bit float support for user mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 18:40:20 +00:00
3dd9a152e1
More MMU registers (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 12:43:10 +00:00
d07b4d0ea7
Fix MXCC register 64 bit read word order (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-19 19:14:10 +00:00
87ecb68bdf
Break up vl.h.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 17:14:51 +00:00
2761992d13
Remove unnecessary register masking (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3663 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 08:21:43 +00:00
bbf7d96b45
Fix MXCC error register (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3662 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 08:19:57 +00:00
295db11371
Add MXCC module reset register (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3661 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 08:18:59 +00:00
bd37ec2141
removed warning
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3616 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 19:50:22 +00:00
aaed909a49
added cpu_model parameter to cpu_init()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
7d77bf2006
More Sparc64 CPU definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3561 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 09:32:02 +00:00
406f82e833
More CPU definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3559 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-09 19:08:43 +00:00
6d5f237a59
CPU specific boot mode (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-07 17:03:37 +00:00
273af66025
Adjust s390 addresses (the MSB is defined as "to be ignored").
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29 14:39:49 +00:00
eed152bba5
Use shared ctpop64 helper
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3468 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28 14:35:04 +00:00
20b749f607
Avoid gcc warnings
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3412 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-20 07:09:08 +00:00
1e64e78d0c
Fix compiling Sparc64 on PPC host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3411 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-20 07:07:47 +00:00
e909ec2f11
Use ldq and stq for 8 byte accesses (original patch by Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3405 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-17 17:37:13 +00:00
8f577d3d29
Enable all alignment checks
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3404 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-17 17:34:57 +00:00
94ced07534
Fix bug in Sparc32 sta op (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3399 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 20:27:00 +00:00
blueswir1