Commit Graph

2062 Commits

Author SHA1 Message Date
Peter Maydell fe8d2d5737 Some strace cleanups
Minor fixes for setsockopt() and netlink
 Manage 'F' flag with qemu-binfmt-conf.sh
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Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-3.0-pull-request' into staging

Some strace cleanups
Minor fixes for setsockopt() and netlink
Manage 'F' flag with qemu-binfmt-conf.sh

# gpg: Signature made Tue 03 Jul 2018 17:34:20 BST
# gpg:                using RSA key F30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>"
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>"
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-3.0-pull-request:
  linux-user/strace: Improve recvmsg() output
  linux-user/strace: Improve capget()/capset() output
  linux-user: update do_setsockopt()
  linux-user: add netlink CARRIER_UP_COUNT/CARRIER_DOWN_COUNT
  qemu-binfmt-conf.sh: allow to provide a suffix to the interpreter name
  qemu-binfmt-conf.sh: add persistent (F) flags
  qemu-binfmt-conf.sh: cleanup --credential

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-04 22:38:10 +01:00
Peter Maydell f988c7e191 OpenRISC cleanups and Fixes for QEMU 3.0
Mostly patches from Richard Henderson fixing multiple things:
  * Fix singlestepping in GDB.
  * Use more TB linking.
  * Fixes to exit TB after updating SPRs to enable registering of state
    changes.
  * Significant optimizations and refactors to the TLB
  * Split out disassembly from translation.
  * Add qemu-or1k to qemu-binfmt-conf.sh.
  * Implement signal handling for linux-user.
 
 Then there are a few fixups from me:
  * Fix delay slot detections to match hardware, this was masking a bug
    in the linus kernel.
  * Fix stores to the PIC mask register
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Merge remote-tracking branch 'remotes/shorne/tags/pull-or-20180703' into staging

OpenRISC cleanups and Fixes for QEMU 3.0

Mostly patches from Richard Henderson fixing multiple things:
 * Fix singlestepping in GDB.
 * Use more TB linking.
 * Fixes to exit TB after updating SPRs to enable registering of state
   changes.
 * Significant optimizations and refactors to the TLB
 * Split out disassembly from translation.
 * Add qemu-or1k to qemu-binfmt-conf.sh.
 * Implement signal handling for linux-user.

Then there are a few fixups from me:
 * Fix delay slot detections to match hardware, this was masking a bug
   in the linus kernel.
 * Fix stores to the PIC mask register

# gpg: Signature made Tue 03 Jul 2018 14:44:10 BST
# gpg:                using RSA key C3B31C2D5E6627E4
# gpg: Good signature from "Stafford Horne <shorne@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: D9C4 7354 AEF8 6C10 3A25  EFF1 C3B3 1C2D 5E66 27E4

* remotes/shorne/tags/pull-or-20180703: (25 commits)
  target/openrisc: Fix writes to interrupt mask register
  target/openrisc: Fix delay slot exception flag to match spec
  linux-user: Fix struct sigaltstack for openrisc
  linux-user: Implement signals for openrisc
  target/openrisc: Add support in scripts/qemu-binfmt-conf.sh
  target/openrisc: Reorg tlb lookup
  target/openrisc: Increase the TLB size
  target/openrisc: Stub out handle_mmu_fault for softmmu
  target/openrisc: Use identical sizes for ITLB and DTLB
  target/openrisc: Fix cpu_mmu_index
  target/openrisc: Fix tlb flushing in mtspr
  target/openrisc: Reduce tlb to a single dimension
  target/openrisc: Merge mmu_helper.c into mmu.c
  target/openrisc: Remove indirect function calls for mmu
  target/openrisc: Merge tlb allocation into CPUOpenRISCState
  target/openrisc: Form the spr index from tcg
  target/openrisc: Exit the TB after l.mtspr
  target/openrisc: Split out is_user
  target/openrisc: Link more translation blocks
  target/openrisc: Fix singlestep_enabled
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-07-03 16:04:41 +01:00
Philippe Mathieu-Daudé 377e93e9e8 linux-user/strace: Improve recvmsg() output
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-By: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180628034652.24152-7-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-07-03 16:27:15 +02:00
Philippe Mathieu-Daudé ecfec98cf3 linux-user/strace: Improve capget()/capset() output
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-By: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180628034652.24152-3-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-07-03 16:27:15 +02:00
Peter Maydell b07cd3e748 ppc patch queue 2018-07-03
Here's a last minue pull request before today's soft freeze.  Ideally
 I would have sent this earlier, but I was waiting for a couple of
 extra fixes I knew were close.  And the freeze crept up on me, like
 always.
 
 Most of the changes here are bugfixes in any case.  There are some
 cleanups as well, which have been in my staging tree for a little
 while.  There are a couple of truly new features (some extensions to
 the sam460ex platform), but these are low risk, since they only affect
 a new and not really stabilized machine type anyway.
 
 Higlights are:
   * Mac platform improvements from Mark Cave-Ayland
   * Sam460ex improvements from BALATON Zoltan et al.
   * XICS interrupt handler cleanups from Cédric Le Goater
   * TCG improvements for atomic loads and stores from Richard
     Henderson
   * Assorted other bugfixes
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Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.0-20180703' into staging

ppc patch queue 2018-07-03

Here's a last minue pull request before today's soft freeze.  Ideally
I would have sent this earlier, but I was waiting for a couple of
extra fixes I knew were close.  And the freeze crept up on me, like
always.

Most of the changes here are bugfixes in any case.  There are some
cleanups as well, which have been in my staging tree for a little
while.  There are a couple of truly new features (some extensions to
the sam460ex platform), but these are low risk, since they only affect
a new and not really stabilized machine type anyway.

Higlights are:
  * Mac platform improvements from Mark Cave-Ayland
  * Sam460ex improvements from BALATON Zoltan et al.
  * XICS interrupt handler cleanups from Cédric Le Goater
  * TCG improvements for atomic loads and stores from Richard
    Henderson
  * Assorted other bugfixes

# gpg: Signature made Tue 03 Jul 2018 06:55:22 BST
# gpg:                using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-3.0-20180703: (35 commits)
  ppc: Include vga cirrus card into the compiling process
  target/ppc: Relax reserved bitmask of indexed store instructions
  target/ppc: set is_jmp on ppc_tr_breakpoint_check
  spapr: compute default value of "hpt-max-page-size" later
  target/ppc/kvm: don't pass cpu to kvm_get_smmu_info()
  target/ppc/kvm: get rid of kvm_get_fallback_smmu_info()
  ppc440_uc: Basic emulation of PPC440 DMA controller
  sam460ex: Add RTC device
  hw/timer: Add basic M41T80 emulation
  ppc4xx_i2c: Rewrite to model hardware more closely
  hw/ppc: Give sam46ex its own config option
  fpu_helper.c: fix setting FPSCR[FI] bit
  target/ppc: Implement the rest of gen_st_atomic
  target/ppc: Implement the rest of gen_ld_atomic
  target/ppc: Use atomic min/max helpers
  target/ppc: Use MO_ALIGN for EXIWX and ECOWX
  target/ppc: Split out gen_st_atomic
  target/ppc: Split out gen_ld_atomic
  target/ppc: Split out gen_load_locked
  target/ppc: Tidy gen_conditional_store
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	hw/ppc/spapr.c
2018-07-03 14:59:27 +01:00
Richard Henderson 4151e53019 linux-user: Fix struct sigaltstack for openrisc
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2018-07-03 22:40:33 +09:00
Richard Henderson e8f29049b1 linux-user: Implement signals for openrisc
All of the existing code was boilerplate from elsewhere,
and would crash the guest upon the first signal.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>

---
v2:
  Add a comment to the new definition of target_pt_regs.
  Install the signal mask into the ucontext.
v3:
  Incorporate feedback from Laurent.
2018-07-03 22:40:33 +09:00
Richard Henderson 14db18997e target/ppc: Remove POWERPC_EXCP_STCX
Always use the gen_conditional_store implementation that uses
atomic_cmpxchg.  Make sure and clear reserve_addr across most
interrupts crossing the cpu_loop.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-07-03 09:56:52 +10:00
Laurent Vivier 21749c4c28 linux-user: update do_setsockopt()
add IPV6_MULTICAST_HOPS and IPV6_MULTICAST_LOOP that need
32bit value conversion

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180627212152.26525-3-laurent@vivier.eu>
2018-07-02 20:16:35 +02:00
Laurent Vivier d2ba246cf3 linux-user: add netlink CARRIER_UP_COUNT/CARRIER_DOWN_COUNT
Error is reported with libuv test suite:

 not ok 311 - udp_multicast_interface6
 # exit code 134
 # Output from process `udp_multicast_interface6`:
 # Unknown host QEMU_IFLA type: 47
 # Unknown host QEMU_IFLA type: 48
 # Unknown host QEMU_IFLA type: 47
 # Unknown host QEMU_IFLA type: 48
 # Unknown host QEMU_IFLA type: 47
 # Unknown host QEMU_IFLA type: 48
 # Unknown host QEMU_IFLA type: 47
 # Unknown host QEMU_IFLA type: 48
 # Unknown host QEMU_IFLA type: 47
 # Unknown host QEMU_IFLA type: 48

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180627212152.26525-2-laurent@vivier.eu>
2018-07-02 20:16:35 +02:00
Philippe Mathieu-Daudé b52713c1d5 linux-user: Use the IEC binary prefix definitions
It eases code review, unit is explicit.

Patch generated using:

  $ git grep -n '[<>][<>]= ?[1-5]0'

and modified manually.

Suggested-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-46-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-02 15:41:18 +02:00
Richard Henderson 26c470a7bb target/arm: Implement ARMv8.2-DotProd
We've already added the helpers with an SVE patch, all that remains
is to wire up the aa64 and aa32 translators.  Enable the feature
within -cpu max for CONFIG_USER_ONLY.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-36-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-29 15:11:15 +01:00
Richard Henderson 802ac0e1e9 target/arm: Enable SVE for aarch64-linux-user
Enable ARM_FEATURE_SVE for the generic "max" cpu.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-35-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-29 15:11:15 +01:00
Paolo Bonzini 8bca9a03ec move public invalidate APIs out of translate-all.{c,h}, clean up
Place them in exec.c, exec-all.h and ram_addr.h.  This removes
knowledge of translate-all.h (which is an internal header) from
several files outside accel/tcg and removes knowledge of
AddressSpace from translate-all.c (as it only operates on ram_addr_t).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-06-28 19:05:30 +02:00
Emilio G. Cota 0ac20318ce tcg: remove tb_lock
Use mmap_lock in user-mode to protect TCG state and the page descriptors.
In !user-mode, each vCPU has its own TCG state, so no locks needed.
Per-page locks are used to protect the page descriptors.

Per-TB locks are used in both modes to protect TB jumps.

Some notes:

- tb_lock is removed from notdirty_mem_write by passing a
  locked page_collection to tb_invalidate_phys_page_fast.

- tcg_tb_lookup/remove/insert/etc have their own internal lock(s),
  so there is no need to further serialize access to them.

- do_tb_flush is run in a safe async context, meaning no other
  vCPU threads are running. Therefore acquiring mmap_lock there
  is just to please tools such as thread sanitizer.

- Not visible in the diff, but tb_invalidate_phys_page already
  has an assert_memory_lock.

- cpu_io_recompile is !user-only, so no mmap_lock there.

- Added mmap_unlock()'s before all siglongjmp's that could
  be called in user-mode while mmap_lock is held.
  + Added an assert for !have_mmap_lock() after returning from
    the longjmp in cpu_exec, just like we do in cpu_exec_step_atomic.

Performance numbers before/after:

Host: AMD Opteron(tm) Processor 6376

                 ubuntu 17.04 ppc64 bootup+shutdown time

  700 +-+--+----+------+------------+-----------+------------*--+-+
      |    +    +      +            +           +           *B    |
      |         before ***B***                            ** *    |
      |tb lock removal ###D###                         ***        |
  600 +-+                                           ***         +-+
      |                                           **         #    |
      |                                        *B*          #D    |
      |                                     *** *         ##      |
  500 +-+                                ***           ###      +-+
      |                             * ***           ###           |
      |                            *B*          # ##              |
      |                          ** *          #D#                |
  400 +-+                      **            ##                 +-+
      |                      **           ###                     |
      |                    **           ##                        |
      |                  **         # ##                          |
  300 +-+  *           B*          #D#                          +-+
      |    B         ***        ###                               |
      |    *       **       ####                                  |
      |     *   ***      ###                                      |
  200 +-+   B  *B     #D#                                       +-+
      |     #B* *   ## #                                          |
      |     #*    ##                                              |
      |    + D##D#     +            +           +            +    |
  100 +-+--+----+------+------------+-----------+------------+--+-+
           1    8      16      Guest CPUs       48           64
  png: https://imgur.com/HwmBHXe

              debian jessie aarch64 bootup+shutdown time

  90 +-+--+-----+-----+------------+------------+------------+--+-+
     |    +     +     +            +            +            +    |
     |         before ***B***                                B    |
  80 +tb lock removal ###D###                              **D  +-+
     |                                                   **###    |
     |                                                 **##       |
  70 +-+                                             ** #       +-+
     |                                             ** ##          |
     |                                           **  #            |
  60 +-+                                       *B  ##           +-+
     |                                       **  ##               |
     |                                    ***  #D                 |
  50 +-+                               ***   ##                 +-+
     |                             * **   ###                     |
     |                           **B*  ###                        |
  40 +-+                     ****  # ##                         +-+
     |                   ****     #D#                             |
     |             ***B**      ###                                |
  30 +-+    B***B**        ####                                 +-+
     |    B *   *     # ###                                       |
     |     B       ###D#                                          |
  20 +-+   D  ##D##                                             +-+
     |      D#                                                    |
     |    +     +     +            +            +            +    |
  10 +-+--+-----+-----+------------+------------+------------+--+-+
          1     8     16      Guest CPUs        48           64
  png: https://imgur.com/iGpGFtv

The gains are high for 4-8 CPUs. Beyond that point, however, unrelated
lock contention significantly hurts scalability.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-06-15 08:18:48 -10:00
Richard Henderson dec1c92849 linux-user/sparc64: Add inotify_rm_watch and tee syscalls
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180607184844.30126-5-richard.henderson@linaro.org>
2018-06-11 14:47:45 +02:00
Richard Henderson 966a6356b7 linux-user/microblaze: Fix typo in accept4 syscall
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180607184844.30126-4-richard.henderson@linaro.org>
[lv: replace tabs by spaces]
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-06-11 14:47:08 +02:00
Richard Henderson 58c9d45a1d linux-user/hppa: Fix typo in mknodat syscall
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180607184844.30126-3-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-06-11 14:45:44 +02:00
Richard Henderson b7bf79ccdd linux-user/alpha: Fix epoll syscalls
These were named incorrectly, going so far as to invade strace.list.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180607184844.30126-2-richard.henderson@linaro.org>
[lv: replace tabs by spaces]
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-06-11 14:44:22 +02:00
Philippe Mathieu-Daudé 71987b125b linux-user: Use is_error() to avoid warnings and make the code clearer
This fixes:

  linux-user/flatload.c:740:9: warning: Loss of sign in implicit conversion
      if (res > (unsigned long)-4096)
          ^~~

Reported-by: Clang Static Analyzer
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180604153722.24956-3-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-06-11 14:40:11 +02:00
Philippe Mathieu-Daudé 1129dd7121 linux-user: Export use is_error(), use it to avoid warnings
This fixes:

  linux-user/flatload.c:740:9: warning: Loss of sign in implicit conversion
      if (res > (unsigned long)-4096)
          ^~~

Reported-by: Clang Static Analyzer
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180604153722.24956-2-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-06-11 14:40:11 +02:00
Laurent Vivier 7ea65371ee linux-user: remove useless #if
Remove a "#if defined(XX) || defined(YY) || ..." with all available
targets

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-16-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier db30b1aa8c linux-user: move hppa signal definitions to hppa/target_signal.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-15-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier 3e511153a8 linux-user: move alpha signal definitions to alpha/target_signal.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-14-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier 5795083b16 linux-user: move openrisc signal definitions to openrisc/target_signal.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-13-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier f70c731347 linux-user: move mips signal definitions to mips/target_signal.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-12-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier 1bdefb5ac7 linux-user: move sparc signal definitions to sparc/target_signal.h
Remove sparc64/target_signal.h, use sparc/target_signal.h instead.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-11-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier e5171a9eb9 linux-user: move generic signal definitions to generic/signal.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-10-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier 9850f9f63a linux-user: move get_sp_from_cpustate() to target_cpu.h
Remove useless includes
Fix HPPA include guard.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20180529194207.31503-9-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier 995d2004b7 linux-user: move sparc/sparc64 fcntl definitions to sparc/target_fcntl.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-8-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier 3e6800ba3c linux-user: move ppc fcntl definitions to ppc/target_fcntl.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-7-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier b9acdef786 linux-user: move mips/mips64 fcntl definitions to mips/target_fcntl.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-6-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier 050a1ba69a linux-user: move arm/aarch64/m68k fcntl definitions to [arm|aarch64|m68k]/target_fcntl.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20180529194207.31503-5-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier 8b08c98e47 linux-user: move hppa fcntl definitions to hppa/target_fcntl.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20180529194207.31503-4-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier 40460c16ee linux-user: move alpha fcntl definitions to alpha/target_fcntl.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20180529194207.31503-3-laurent@vivier.eu>
2018-06-04 01:30:44 +02:00
Laurent Vivier 5de7706e2c linux-user: move generic fcntl definitions to generic/fcntl.h
add a per target target_fcntl.h and include the generic one from them

No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180529194207.31503-2-laurent@vivier.eu>
2018-06-04 01:30:43 +02:00
Philippe Mathieu-Daudé 871f95c617 syscall: replace strcpy() by g_strlcpy()
linux-user/syscall.c:9860:17: warning: Call to function 'strcpy' is insecure as it does not provide bounding of the memory buffer. Replace unbounded copy functions with analogous functions that support length arguments such as 'strlcpy'. CWE-119
                strcpy (buf->machine, cpu_to_uname_machine(cpu_env));
                ^~~~~~

Reported-by: Clang Static Analyzer
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20170724182751.18261-32-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-06-04 01:30:43 +02:00
Edgar E. Iglesias 0a22f8cf3e target-microblaze: Make special registers 64-bit
Extend special registers to 64-bits. This is in preparation for
MFSE/MTSE, moves to and from extended special registers.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-05-29 09:35:14 +02:00
Laurent Vivier b0a7413dd5 linux-user: define TARGET_SO_REUSEPORT
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180519092956.15134-9-laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Laurent Vivier 30a1b12588 linux-user: copy sparc/sockbits.h definitions from linux
Values defined for sparc are not correct.
Copy the content of "arch/sparc/include/uapi/asm/socket.h"
to fix them.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20180519092956.15134-8-laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Laurent Vivier 8f553bf77c linux-user: update ARCH_HAS_SOCKET_TYPES use
to be like in the kernel and rename it TARGET_ARCH_HAS_SOCKET_TYPES

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20180519092956.15134-7-laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Laurent Vivier 9e979d64e8 linux-user: move ppc socket.h definitions to ppc/sockbits.h
Change conditional #ifdef part by #undef of the symbols
redefined for PPC relative to generic/socket.h

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20180519092956.15134-6-laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Laurent Vivier 500fa60760 linux-user: move socket.h generic definitions to generic/sockbits.h
and include the file from architectures without specific definitions

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20180519092956.15134-5-laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Laurent Vivier da84fdaaf8 linux-user: move sparc/sparc64 socket.h definitions to sparc/sockbits.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180519092956.15134-4-laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Laurent Vivier f24cbd398e linux-user: move alpha socket.h definitions to alpha/sockbits.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180519092956.15134-3-laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Laurent Vivier 5de33b105d linux-user: move mips socket.h definitions to mips/sockbits.h
No code change.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180519092956.15134-2-laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Peter Maydell 309786cfd8 linux-user: Fix payload size logic in host_to_target_cmsg()
Coverity points out that there's a missing break in the switch in
host_to_target_cmsg() where we update tgt_len for
cmsg_level/cmsg_type combinations which require a different length
for host and target (CID 1385425).  To avoid duplicating the default
case (target length same as host) in both switches, set that before
the switch so that only the cases which want to override it need any
code.

This fixes a bug where we would have used the wrong length
for SOL_SOCKET/SO_TIMESTAMP messages where the target and
host have differently sized 'struct timeval' (ie one is 32
bit and the other is 64 bit).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180518184715.29833-1-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Igor Mammedov 2b5249b85c linux-user: update comments to point to tcg_exec_init()
cpu_init() was replaced by cpu_create() since 2.12 but comments
weren't updated. So update stale comments to point that page
sizes arei actually initialized by tcg_exec_init(). Also move
another qemu_host_page_size related comment before tcg_exec_init()
where it belongs.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <1526557877-293151-1-git-send-email-imammedo@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Laurent Vivier c1e703f558 linux-user: update netlink emulation
Update enums with entries from linux 4.17

Translate entries that generate logs with iproute2 4.9.0 and
host kernel 4.15:

  # ip address show
  Unknown host QEMU_IFLA type: 43
  Unknown host QEMU_IFLA type: 43
  Unknown host QEMU_IFLA type: 43
  Unknown QEMU_IFLA_BR type 41
  Unknown QEMU_IFLA_BR type 42
  Unknown QEMU_IFLA_BR type 43
  Unknown QEMU_IFLA_BR type 44
  Unknown host QEMU_IFLA type: 43
  Unknown QEMU_IFLA_BR type 41
  Unknown QEMU_IFLA_BR type 42
  Unknown QEMU_IFLA_BR type 43
  Unknown QEMU_IFLA_BR type 44
  Unknown host QEMU_IFLA type: 43

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20180516221213.11111-1-laurent@vivier.eu>
2018-05-25 10:10:55 +02:00
Peter Maydell f39ddb3a08 -----BEGIN PGP SIGNATURE-----
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Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-2.13-pull-request' into staging

# gpg: Signature made Mon 14 May 2018 19:15:02 BST
# gpg:                using RSA key F30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>"
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>"
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-2.13-pull-request:
  linux-user: correctly align types in thunking code
  linux-user: fix UNAME_MACHINE for sparc/sparc64
  linux-user: add sparc/sparc64 specific errno
  linux-user: fix conversion of flock/flock64 l_type field
  linux-user: update sparc/syscall_nr.h to linux header 4.16
  linux-user: fix flock/flock64 padding
  linux-user: define correct fcntl() values for sparc

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-05-15 10:04:22 +01:00