bellard
|
93ac68bca5
|
sparc emulation target (thanx to Thomas M. Ogrisegg)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@388 c046a42c-6fe2-441c-8c8c-71466251a162
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2003-09-30 20:57:29 +00:00 |
|
bellard
|
facc68be25
|
removed x86 hacks
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@377 c046a42c-6fe2-441c-8c8c-71466251a162
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2003-09-17 22:51:18 +00:00 |
|
bellard
|
2e255c6b9f
|
faster and more accurate segment handling
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@373 c046a42c-6fe2-441c-8c8c-71466251a162
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2003-08-21 23:25:21 +00:00 |
|
bellard
|
3f33731662
|
pop ss, mov ss, x and sti disable irqs for the next instruction - began dispatch optimization by adding new x86 cpu 'hidden' flags
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@372 c046a42c-6fe2-441c-8c8c-71466251a162
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2003-08-20 23:02:09 +00:00 |
|
bellard
|
d05e66d217
|
no error code if hardware interrupt
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@371 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-08-20 21:34:35 +00:00 |
|
bellard
|
38e584a072
|
m68k host port (Richard Zidlicky)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@357 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-08-10 22:14:22 +00:00 |
|
bellard
|
4cbf74b6b8
|
soft mmu support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@355 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-08-10 21:48:43 +00:00 |
|
bellard
|
b6d78bfa0d
|
correct CPL support (should fix flat real mode support)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@343 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-07-29 20:53:01 +00:00 |
|
bellard
|
a412ac572f
|
real mode support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@335 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-07-26 18:01:40 +00:00 |
|
bellard
|
4c3a88a284
|
gdb stub breakpoints support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@332 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-07-26 12:06:08 +00:00 |
|
bellard
|
1b21b62ab4
|
ARM fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@317 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-07-09 17:16:27 +00:00 |
|
bellard
|
907a5b2690
|
fixed invalid irq jump chaining
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@300 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-06-30 23:18:22 +00:00 |
|
bellard
|
68a7931591
|
reduced irq latency
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@296 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-06-30 13:12:32 +00:00 |
|
bellard
|
83479e770d
|
suppressed ring 0 hacks
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@275 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-06-25 16:12:37 +00:00 |
|
bellard
|
3fb2ded1d5
|
hardware interrupt support - support forfull ring 0 exception simulation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@260 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-06-24 13:22:59 +00:00 |
|
bellard
|
970a87a6bb
|
new segment access
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@255 c046a42c-6fe2-441c-8c8c-71466251a162
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2003-06-21 13:13:25 +00:00 |
|
bellard
|
e4533c7a8c
|
main cpu loop is target independent
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@238 c046a42c-6fe2-441c-8c8c-71466251a162
|
2003-06-15 19:51:39 +00:00 |