Commit Graph

217 Commits

Author SHA1 Message Date
Mateja Marjanovic 53e116fed6 target/mips: Add tests for a variety of MSA integer subtract instructions
Add tests for a variety of MSA integer subtract instructions.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551964929-17845-6-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-11 12:45:36 +01:00
Mateja Marjanovic 4b302ce90d target/mips: Add tests for a variety of MSA integer multiply instructions
Add tests for a variety of MSA integer multiply instructions.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551964929-17845-5-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-11 12:45:36 +01:00
Mateja Marjanovic a8f91dd9fd target/mips: Add tests for a variety of MSA integer dot product instructions
Add tests for a variety of MSA integer dot product instructions.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551964929-17845-4-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-11 12:45:36 +01:00
Mateja Marjanovic 72f463bc08 target/mips: Add tests for a variety of MSA integer divide instructions
Add tests for a variety of MSA integer divide instructions.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551964929-17845-3-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-11 12:45:36 +01:00
Mateja Marjanovic 1be82d8901 target/mips: Add tests for a variety of MSA integer average instructions
Add tests for a variety of MSA integer average instructions.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551964929-17845-2-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-11 12:45:36 +01:00
Aleksandar Markovic 81526dff27 tests/tcg: target/mips: Rename two header files for consistency
Rename two header files for consistency and clarity. Do all other
changes to accommodate new names.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <amarkovic@wavecomp.com>
Message-Id: <1551981716-30664-3-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-11 12:36:58 +01:00
Aleksandar Markovic dd8d6a2d5a tests/tcg: target/mips: Correct preambles of test source files
Correct preambles of test source files.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <amarkovic@wavecomp.com>
Message-Id: <1551981716-30664-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-11 12:36:49 +01:00
Mateja Marjanovic 0fdd986a6c target/mips: Add tests for integer add MSA instruction group
These are the regression tests for integer addition MSA instruction
- various flavors of instruction add (ADD, ADDS, HADD,...).

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551718283-4487-3-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-05 17:05:33 +01:00
Aleksandar Markovic 2a367db039 tests/tcg: target/mips: Add tests for MSA pack instructions
Add tests for MSA pack instructions. This includes following
instructions:

  * PCKEV.B - pack even (bytes)
  * PCKEV.H - pack even (halfwords)
  * PCKEV.W - pack even (words)
  * PCKEV.D - pack even (doublewords)
  * PCKOD.B - pack odd (bytes)
  * PCKOD.H - pack odd (halfwords)
  * PCKOD.W - pack odd (words)
  * PCKOD.D - pack odd (doublewords)
  * VSHF.B - data preserving shuffle (bytes)
  * VSHF.H - data preserving shuffle (halfwords)
  * VSHF.W - data preserving shuffle (words)
  * VSHF.D - data preserving shuffle (doublewords)

Each test consists of 80 test cases, so altogether there are 960
test cases.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-15-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:03:44 +01:00
Aleksandar Markovic 7ecdacc568 tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructions
Add tests for MIPS64R6 integer multiply instructions: MUL, MUH, MULU,
MUHU, DMUL, DMUH, DMULU, and DMUHU.

MUH and MUHU require 64 bit inputs in the form of 64-bit sign-extended
32-bit inputs.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-14-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:03:33 +01:00
Aleksandar Markovic 09a1bc758e tests/tcg: target/mips: Add tests for MIPS64R6 shift instructions
Add tests for MIPS64R6 shift instructions: SLLV, SRLV, SRAV, DSLLV,
DSRLV, and DSRAV.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-13-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:03:24 +01:00
Aleksandar Markovic 9dea2df848 tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructions
Add tests for MIPS64R6 bit count instructions: CLO, CLZ, DCLO, and DCLZ.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-12-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:03:15 +01:00
Aleksandar Markovic 8708c32a47 tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructions
Add tests for MIPS64R6 bit swap instructions: BITSWAP and DBITSWAP.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-11-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:03:04 +01:00
Aleksandar Markovic 99d46107f7 tests/tcg: target/mips: Add tests for MIPS64R6 logic instructions
Add tests for MIPS64R6 logic instructions: AND, NOR, OR, and XOR.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-10-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:02:54 +01:00
Aleksandar Markovic 50dccc057f tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructions
Add wrappers for some MIPS64R6 instructions.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-9-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:02:46 +01:00
Aleksandar Markovic 6ae2e3bb33 tests/tcg: target/mips: Extend functionality of MSA wrapper macros
Add macros that will allow testing cases when one of the source
registers is identical to the destination register.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-8-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:02:37 +01:00
Aleksandar Markovic dd3ba7036f tests/tcg: target/mips: Fix test utilities for 128-bit tests
Add "static" and "const" modifiers where appropriate, and fix other
minor issues.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-7-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:02:30 +01:00
Aleksandar Markovic ace4458466 tests/tcg: target/mips: Add test utilities for 64-bit tests
Add test utilities for 64-bit tests. Some of MIPS64R6 instructions
require 64-bit inputs to be 32-bit integers sign-extedned to 64 bits,
hence the need for sets of such inputs.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-6-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:02:22 +01:00
Aleksandar Markovic 26b3256392 tests/tcg: target/mips: Add test utilities for 32-bit tests
Add test utilities for 32-bit tests.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-5-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:02:13 +01:00
Aleksandar Markovic 9e9509421f tests/tcg: target/mips: Add wrappers for various MSA instructions
Add wrappers for various MSA integer instructions.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-4-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05 17:02:03 +01:00
Peter Maydell 4179575898 target/xtensa: FLIX support, various fixes and test improvements
- add FLIX (flexible length instructions extension) support;
 - make testsuite runnable on wider range of xtensa cores;
 - add floating point opcode tests;
 - don't add duplicate 'static' in import_core.sh script;
 - fix undefined opcodes detection in test_mmuhifi_c3 overlay.
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Merge remote-tracking branch 'remotes/xtensa/tags/20190228-xtensa' into staging

target/xtensa: FLIX support, various fixes and test improvements

- add FLIX (flexible length instructions extension) support;
- make testsuite runnable on wider range of xtensa cores;
- add floating point opcode tests;
- don't add duplicate 'static' in import_core.sh script;
- fix undefined opcodes detection in test_mmuhifi_c3 overlay.

# gpg: Signature made Thu 28 Feb 2019 12:53:23 GMT
# gpg:                using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg:                issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>" [full]
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20190228-xtensa: (40 commits)
  tests/tcg/xtensa: add FPU2000 coprocessor tests
  tests/tcg/xtensa: add FP1 group tests
  tests/tcg/xtensa: add FP0 group conversion tests
  tests/tcg/xtensa: add FP0 group arithmetic tests
  tests/tcg/xtensa: add LSCI/LSCX group tests
  tests/tcg/xtensa: add test for FLIX
  tests/tcg/xtensa: conditionalize MMU-related tests
  tests/tcg/xtensa: conditionalize windowed register tests
  tests/tcg/xtensa: conditionalize and fix s32c1i tests
  tests/tcg/xtensa: fix SR tests for big endian configs
  tests/tcg/xtensa: conditionalize and expand SR tests
  tests/tcg/xtensa: conditionalize timer/CCOUNT tests
  tests/tcg/xtensa: conditionalize interrupt tests
  tests/tcg/xtensa: add straightforward conditionals
  tests/tcg/xtensa: conditionalize cache option tests
  tests/tcg/xtensa: conditionalize debug option tests
  tests/tcg/xtensa: enable boolean tests
  tests/tcg/xtensa: fix endianness issues in test_b
  tests/tcg/xtensa: don't use optional opcodes in generic code
  tests/tcg/xtensa: support configs with LITBASE
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-28 19:04:16 +00:00
Max Filippov de0cebd930 tests/tcg/xtensa: add FPU2000 coprocessor tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:24 -08:00
Max Filippov fd78bc55a4 tests/tcg/xtensa: add FP1 group tests
Test comparisons and conditional move operations.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:24 -08:00
Max Filippov 710b15f041 tests/tcg/xtensa: add FP0 group conversion tests
Test conversions for normal, NaN and Inf arguments.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 9d012e8ec2 tests/tcg/xtensa: add FP0 group arithmetic tests
Test arithmetic operations for normal, NaN and Inf arguments.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 5e33b037b5 tests/tcg/xtensa: add LSCI/LSCX group tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov ebbd775aab tests/tcg/xtensa: add test for FLIX
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 3db8a95e70 tests/tcg/xtensa: conditionalize MMU-related tests
Make MMU-related tests conditional on the presence of MMUv2 option.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov c20e10eac8 tests/tcg/xtensa: conditionalize windowed register tests
Make windowed register tests conditional on the presence of this option.
Fix tests to work correctly for both 32 and 64 physical registers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 00988da486 tests/tcg/xtensa: conditionalize and fix s32c1i tests
Make s32c1i tests conditional on the presence of this option. Initialize
ATOMCTL SR when it's present to allow RCW transactions on uncached
memory.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 9b2d08a066 tests/tcg/xtensa: fix SR tests for big endian configs
SR tests generate instructions that the assembler does not recognize and
thus must take care about configuration endianness.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 50d3a0feae tests/tcg/xtensa: conditionalize and expand SR tests
Make tests for specific special registers conditional on the presence of
the options that add these registers and test that the registers are not
accessible otherwise.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 02a5a4a877 tests/tcg/xtensa: conditionalize timer/CCOUNT tests
Make timer/CCOUNT tests conditional on the presence of timer option and
number of configured timers. Don't use hard coded interrupt levels for
timers, use configured values.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 9c98822619 tests/tcg/xtensa: conditionalize interrupt tests
Make interrupt tests conditional on the presence of interrupt option and
on the presence of level-1 and high level software interrupts. Don't use
hard-coded interrupt level for the high level interrupt tests, choose
high level software IRQ and use its configured level.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 50f0171a95 tests/tcg/xtensa: add straightforward conditionals
Make tests for optional instruction groups conditional on the presence
of corresponding options in the config.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov ecf5b57759 tests/tcg/xtensa: conditionalize cache option tests
Make data/instruction tests conditional on the presence of
data/instruction cache, whether they're lockable and whether data cache
is writeback.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 66c58ba71b tests/tcg/xtensa: conditionalize debug option tests
Make debug tests conditional on the presence of the debug option in the
config and tests that depend on the presence/number of instruction or
data breakpoint registers on the corresponding definitions. Use
configured debug interrupt level instead of the hardcoded value to set
up IRQ handler and access debug EPC register.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 912f161ff7 tests/tcg/xtensa: enable boolean tests
Uncomment test_boolean in the test makefile. Make actual tests code
conditional on the presence of boolean option in the config.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:23 -08:00
Max Filippov 64eef9bf95 tests/tcg/xtensa: fix endianness issues in test_b
Use bbci.l/bbsi.l instead of bbci/bbsi, as they are assembly macros that
accept little-endian bit number and produce correct immediate for both
little and big endian configurations. Choose value loaded into register
for bbc/bbs opcodes based on configuration endianness.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:22 -08:00
Max Filippov fafd553343 tests/tcg/xtensa: don't use optional opcodes in generic code
Don't use 'loop' opcode in generic testsuite completion code, only use
core opcodes to make it work with any configuration.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:22 -08:00
Max Filippov 306a69dad4 tests/tcg/xtensa: support configs with LITBASE
Configurations with LITBASE register may use absolute literals by
default. Pass --no-absolute-literals option to assembler to use
PC-relative literals instead.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:22 -08:00
Max Filippov 906da88291 tests/tcg/xtensa: support configurations w/o vecbase
Configurations w/o vecbase may have vectors not grouped together and not
in fixed order. They may not always be grouped into single output
sections by assigning next offset to dot, as it may sometimes move dot
backwards and sometimes they may even belong to different memory region.
Don't group vectors into single output section. Instead put each vector
into its own section ant put it at its default virtual address.
Reserve 4KBytes from the default vectors base and put rest of the code
and data starting from there. Mark vectors sections as executable,
otherwise their contents is discarded. There may be as little as 16
bytes reserved for some vectors, load handler address into a0 and use
ret.n to jump there to make vector code fit into this 16 byte space.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:22 -08:00
Max Filippov 0ed040db36 tests/tcg/xtensa: indicate failed tests
When test suite with multiple tests fails it's not obvious which test
failed. Pring "failed" in every invocation of test_fail. Do printing
when DEBUG preprocessor macro is defined.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28 04:43:22 -08:00
Aleksandar Markovic 1e6bea794c tests/tcg: target/mips: Add tests for MSA integer max/min instructions
Add tests for MSA integer max/min instructions. This includes
following instructions:

  * MAX_A.B - maximum of absolute of two signed values (bytes)
  * MAX_A.H - maximum of absolute of two signed values (halfwords)
  * MAX_A.W - maximum of absolute of two signed values (words)
  * MAX_A.D - maximum of absolute of two signed values (doublewords)
  * MIN_A.B - minimum of absolute of two signed values (bytes)
  * MIN_A.H - minimum of absolute of two signed values (halfwords)
  * MIN_A.W - minimum of absolute of two signed values (words)
  * MIN_A.D - minimum of absolute of two signed values (doublewords)
  * MAX_S.B - maximum of two signed values (bytes)
  * MAX_S.H - maximum of two signed values (halfwords)
  * MAX_S.W - maximum of two signed values (words)
  * MAX_S.D - maximum of two signed values (doublewords)
  * MIN_S.B - minimum of two signed values (bytes)
  * MIN_S.H - minimum of two signed values (halfwords)
  * MIN_S.W - minimum of two signed values (words)
  * MIN_S.D - minimum of two signed values (doublewords)
  * MAX_U.B - maximum of two unsigned values (bytes)
  * MAX_U.H - maximum of two unsigned values (halfwords)
  * MAX_U.W - maximum of two unsigned values (words)
  * MAX_U.D - maximum of two unsigned values (doublewords)
  * MIN_U.B - minimum of two unsigned values (bytes)
  * MIN_U.H - minimum of two unsigned values (halfwords)
  * MIN_U.W - minimum of two unsigned values (words)
  * MIN_U.D - minimum of two unsigned values (doublewords)

Each test consists of 80 test cases, so altogether there are 1920
test cases.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551185735-17154-8-git-send-email-aleksandar.markovic@rt-rk.com>
2019-02-27 14:26:14 +01:00
Aleksandar Markovic 1f3a111ecc tests/tcg: target/mips: Add wrappers for MSA integer max/min instructions
Add wrappers for MSA integer max/min instructions.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551185735-17154-7-git-send-email-aleksandar.markovic@rt-rk.com>
2019-02-27 14:26:14 +01:00
Aleksandar Markovic 520e210c0a tests/tcg: target/mips: Add tests for MSA integer compare instructions
Add tests for MSA integer compare instructions. This includes
following instructions:

  * CEQ.B - integer compare equal (bytes)
  * CEQ.H - integer compare equal (halfwords)
  * CEQ.W - integer compare equal (words)
  * CEQ.D - integer compare equal (doublewords)
  * CLE_S.B - signed integer compare less or equal (bytes)
  * CLE_S.H - signed integer compare less or equal (halfwords)
  * CLE_S.W - signed integer compare less or equal (words)
  * CLE_S.D - signed integer compare less or equal (doublewords)
  * CLE_U.B - unsigned integer compare less or equal (bytes)
  * CLE_U.H - unsigned integer compare less or equal (halfwords)
  * CLE_U.W - unsigned integer compare less or equal (words)
  * CLE_U.D - unsigned integer compare less or equal (doublewords)
  * CLT_S.B - signed integer compare less or equal (bytes)
  * CLT_S.H - signed integer compare less or equal (halfwords)
  * CLT_S.W - signed integer compare less or equal (words)
  * CLT_S.D - signed integer compare less or equal (doublewords)
  * CLT_U.B - unsigned integer compare less or equal (bytes)
  * CLT_U.H - unsigned integer compare less or equal (halfwords)
  * CLT_U.W - unsigned integer compare less or equal (words)
  * CLT_U.D - unsigned integer compare less or equal (doublewords)

Each test consists of 80 test cases, so altogether there are 1600 test
cases.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551185735-17154-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-02-27 14:26:14 +01:00
Aleksandar Markovic a4719aa85e tests/tcg: target/mips: Add wrappers for MSA integer compare instructions
Add wrappers for MSA integer compare instructions.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
2019-02-21 19:36:47 +01:00
Aleksandar Markovic e7bbc9b1c2 tests/tcg: target/mips: Change directory name 'bit-counting' to 'bit-count'
Change directory name 'bit-counting' to 'bit-count'. This is just for
cosmetic and consistency sake. This was the only subdirectory in MSA
test directory that uses ending 'ing'.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-02-21 19:36:47 +01:00
Aleksandar Markovic 1f69d17856 tests/tcg: target/mips: Correct path to headers in some test source files
Correct path to headers in tests/tcg/mips/user/ase/msa/bit-counting/*
source files.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
2019-02-21 19:36:47 +01:00
Aleksandar Markovic ba63292445 tests/tcg: target/mips: Add tests for MSA logic instructions
Add tests for MSA logic instructions. This includes following
instructions:

  * AND.V - logical AND
  * NOR.V - logical NOR
  * OR.V - logical OR
  * XOR.V - logical XOR

Each test consists of 80 test cases, so altogether there are 320
test cases.

Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14 17:47:37 +01:00