Commit Graph

10730 Commits

Author SHA1 Message Date
Paolo Bonzini 652ce2d449 loop write in qemu_event_increment upon EINTR
Same as what qemu-kvm does.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-02-10 11:56:56 -06:00
Paolo Bonzini 1d0f0d91f2 do not loop on an incomplete io_thread_fd read
No need to loop if less than a full buffer is read, the next
read would return EAGAIN.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-02-10 11:56:56 -06:00
Liran Schour 889ae39c9a Try not to exceed max downtime on stage3
Move to stage3 only when remaining work can be done below max downtime.
Use qemu_get_clock_ns for measuring read performance.

Signed-off-by: Liran Schour <lirans@il.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-02-09 16:56:14 -06:00
Liran Schour aaa0eb75e2 Count dirty blocks and expose an API to get dirty count
This will manage dirty counter for each device and will allow to get the
dirty counter from above.

Signed-off-by: Liran Schour <lirans@il.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-02-09 16:56:14 -06:00
Liran Schour d76cac7dfb Tranfer dirty blocks during iterative phase
Start transfer dirty blocks during the iterative stage. That will
reduce the time that the guest will be suspended

Signed-off-by: Liran Schour <lirans@il.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-02-09 16:56:14 -06:00
Paolo Bonzini 41c872b6bf add qemu_get_clock_ns
Some places use get_clock directly because they want to access the
rt_clock with nanosecond precision.  Add a function to do exactly that
instead of using internal interfaces.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-02-09 16:56:13 -06:00
Liran Schour e970ec0b5e Remove unused code
blk_mig_save_bulked_block is never called with sync flag. Remove the sync
flag. Calculate bulk completion during blk_mig_save_bulked_block.
Remove unused constants.

Signed-off-by: Liran Schour <lirans@il.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-02-09 16:56:13 -06:00
Michael S. Tsirkin 7b8f3b7834 kvm: move kvm to use memory notifiers
remove direct kvm calls from exec.c, make
kvm use memory notifiers framework instead.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-02-09 16:56:13 -06:00
Michael S. Tsirkin 46dbef6ade kvm: move kvm_set_phys_mem around
move kvm_set_phys_mem so that it will
be later available earlier in the file.
needed for next patch using memory notifiers.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-02-09 16:56:13 -06:00
Michael S. Tsirkin f6f3fbcab0 qemu: memory notifiers
This adds notifiers for phys memory changes: a set of callbacks that
vhost can register and update kernel accordingly.  Down the road, kvm
code can be switched to use these as well, instead of calling kvm code
directly from exec.c as is done now.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-02-09 16:56:13 -06:00
Aurelien Jarno cca1af8c4d tcg/mips: fix crash in tcg_out_qemu_ld()
The address register is overriden when it corresponds to v0 and the fast
path is taken, which leads to a crash. Fix that by using the a0 register
instead.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 22:54:22 +01:00
Aurelien Jarno 5a25cc2b5c target-sh4: MMU: separate execute and read/write permissions
On SH4, the ITLB and UTLB configurations are memory mapped, so loading
ITLB entries from UTLB has to be simulated correctly. For that the QEMU
TLB has to be handle the execute (ITLB) and read/write permissions
(UTLB) seperately.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 21:08:06 +01:00
Aurelien Jarno 03e3b61e4f target-sh4: MMU: fix store queue addresses
The store queues are located from 0xe0000000 to 0xe3ffffff.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 21:08:05 +01:00
Aurelien Jarno 55ff33a435 target-sh4: MMU: remove dead code
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 21:08:05 +01:00
Aurelien Jarno af090497c6 target-sh4: MMU: reduce the size of a TLB entry
Reduce the size of the TLB entry from 32 to 16 bytes, reorganising
members and using a bit field.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 21:08:05 +01:00
Aurelien Jarno 628b61a072 target-sh4: MMU: optimize UTLB accesses
With the current code, the QEMU TLB is setup to match the read/write
mode of the MMU fault. This means when read access is done, the page
is setup in read-only mode. When the page is later accessed in write
mode, an MMU fault happened, and the page is switch in write-only
mode. This flip-flop causes a lot of calls to the MMU code and slow
down the emulation.

This patch changes the MMU emulation, so that the QEMU TLB is setup
to match the UTLB protection key. This impressively increase the
speed of the emulation.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 21:08:05 +01:00
Aurelien Jarno 4d1e4ff63c target-sh4: MMU: fix ITLB priviledge check
There is an ITLB access violation if SR_MD=0 (user mode) while
the high bit of the protection key is 0 (priviledge mode).

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 21:08:05 +01:00
Aurelien Jarno 0f3f1ec787 target-sh4: MMU: simplify call to tlb_set_page()
tlb_set_page() doesn't need addresses with offset, but simply the
page aligned addresses.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 21:08:05 +01:00
Aurelien Jarno 1f486815ae target-sh4: MMU: fix mem_idx computation
The mem_idx is wrongly computed. As written in target-sh4/cpu.h, mode 0
corresponds to kernel mode (SR_MD = 1), while mode 1 corresponds to user
mode (SR_MD = 0).

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 21:08:05 +01:00
Aurelien Jarno e0bcb9ca36 sh7750: handle MMUCR TI bit
When the MMUCR TI bit is set, all the UTLB and ITLB entries should be
flushed.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 21:07:03 +01:00
Aurelien Jarno 434254aa5f tcg/mips: implement setcond2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 01:01:35 +01:00
Anthony Liguori 0debac1485 Merge remote branch 'linux-user/linux-user-for-upstream' into staging-tmp 2010-02-08 10:09:52 -06:00
Anthony Liguori 8217d94586 Merge remote branch 'qemu-kvm/uq/master' into staging-tmp 2010-02-08 10:06:54 -06:00
Aurelien Jarno 4cb2638218 tcg/mips: implement setcond
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-08 16:37:37 +01:00
TeLeMan 74f42e182a configure: fix the static compilation for sdl
The static compilation for sdl is broken after
7942769317.

Signed-off-by: TeLeMan <geleman@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-08 12:29:20 +01:00
Dirk Ullrich d2807bc98e configure: Add --enable-docs and --disable-docs to --help
This patch adds the documentation-related options "--enable-docs" and
"--disable-docs" to the help message of "configure".

Signed-off-by: Dirk Ullrich <dirk.ullrich@googlemail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-08 12:24:50 +01:00
Aurelien Jarno 3101e99c21 target-sh4: minor optimisations
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-08 12:21:22 +01:00
Aurelien Jarno 37cc0b44b4 SH4/R2D: fix poweroff
The write the the PA_POWOFF register is currently ignored. Fix that by
calling qemu_system_shutdown_request() when a poweroff is requested.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-08 12:21:03 +01:00
Aurelien Jarno 5105c5564c tcg: move setcond* ops to non-optional section
setcond is not an optional op, move it to the non-optional section.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-08 12:10:15 +01:00
Aurelien Jarno add1e7ea61 tcg: add setcondi pseudo-op
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-08 12:06:05 +01:00
Isaku Yamahata 8fd5cf4bcb pci: fix pci_find_bus()
typo in c021f8e65f.
comparison fix.

Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2010-02-08 12:14:42 +02:00
malc 48a402e693 block/curl: %Z is not a valid conversion specifier
Signed-off-by: malc <av1474@comtv.ru>
2010-02-08 12:44:55 +03:00
Paolo Bonzini e8105ebb94 vl.c: avoid preprocessor directives in a printf call
Similar to the qemu-img.c patch, but I also have to unescape remaining
% signs in qemu-options.hx.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: malc <av1474@comtv.ru>
2010-02-08 12:12:40 +03:00
Paolo Bonzini bec7c2d414 do not interpolate % from vl.c to qemu-options.h
Since qemu-options.h is only used in vl.c, we can avoid using
brittle interpolation from a generated file.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: malc <av1474@comtv.ru>
2010-02-08 12:12:40 +03:00
Paolo Bonzini 30bf5f46e7 cope with printf macro definition in readline.c
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: malc <av1474@comtv.ru>
2010-02-08 12:12:40 +03:00
Paolo Bonzini e00291c008 qemu-img: avoid preprocessor directives in a printf call
Other choices include using "(printf)", but this one is not bad in
terms of readability.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: malc <av1474@comtv.ru>
2010-02-08 12:12:40 +03:00
malc 3f020d7024 Revert "On some systems printf is a macro"
This reverts commit bc5b600458.
2010-02-08 12:12:40 +03:00
Blue Swirl d55380bb9c dec: actually implement PCI bridging
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-07 19:28:32 +00:00
Blue Swirl ff9868ecaa esp: use CamelCaseFunc for function types
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-07 09:17:35 +00:00
Blue Swirl b96ae2da0b fw_cfg: don't use reserved _ prefix
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-07 09:15:26 +00:00
Blue Swirl 7859cb988d fdc: don't use reserved _ prefix
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-07 09:13:51 +00:00
Blue Swirl 5c02c03348 fdc: don't use reserved _t suffix
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-07 09:01:18 +00:00
Blue Swirl 8e39a033fb escc: don't use reserved _t suffix
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-07 08:05:47 +00:00
Blue Swirl 43a3470457 m48t59: don't use reserved _t suffix
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-07 08:05:03 +00:00
malc 1cd62ae9f8 tcg/ppc64: implement setcond
Signed-off-by: malc <av1474@comtv.ru>
2010-02-07 02:48:53 +03:00
malc 27a7797b09 tcg/ppc32: proper setcond implementation
Signed-off-by: malc <av1474@comtv.ru>
2010-02-07 02:48:48 +03:00
malc b0809bf7ca tcg/ppc32: implement setcond[2]
Signed-off-by: malc <av1474@comtv.ru>
2010-02-07 02:18:06 +03:00
malc bc5b600458 On some systems printf is a macro
Signed-off-by: malc <av1474@comtv.ru>
2010-02-07 02:04:28 +03:00
malc d0f2c4c602 Do not use dprintf
dprintf is already claimed by POSIX[1], and on at least one system
is implemented as a macro

[1] http://www.opengroup.org/onlinepubs/9699919799/functions/dprintf.html

Signed-off-by: malc <av1474@comtv.ru>
2010-02-07 02:03:50 +03:00
Stefan Weil bc4347b883 arm host: fix compiler warning
Compilation for arm (native or cross) results in this
warning:

fpu/softfloat-native.c: In function ‘float64_round_to_int’:
fpu/softfloat-native.c:387: error: control reaches end of non-void function

float64_round_to_int uses special assembler code for arm
and has no explicit return value.

As there is no obvious reason why arm should need special
code, all fpu related conditionals were removed.
The remaining code is standard (C99) and compiles for arm,
too.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-06 23:16:05 +01:00