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3 Commits

Author SHA1 Message Date
Peter A. G. Crosthwaite fa2ddcb4f5 zynq_slcr: Fixed ResetValues enum 
There is a gap in the reset region of the address space at offset 0x208. This
throws out all these enum values by one when translating them to address offsets.
Fixed by putting the corresponding gap in the enum as well.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2012-10-12 11:54:39 +01:00
Anthony Liguori 0d10f62708 xilinx_zynq: fix the build 
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
 2012-03-09 07:02:50 -06:00
Peter A. G. Crosthwaite e32605062c xilinx_zynq: machine model initial version 
Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific
system level control register (SLCR) module.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 2012-03-07 02:20:19 +01:00