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16 Commits

Author SHA1 Message Date
Alistair Francis 0736febb2d
target/riscv: Remove the hret instruction 
The hret instruction does not exist in the new spec versions, so remove
it from QEMU.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
 2020-02-27 13:45:45 -08:00
Alistair Francis 895c412cb6
target/riscv: Add hfence instructions 
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
 2020-02-27 13:45:44 -08:00
Richard Henderson e761799796
target/riscv: Name the argument sets for all of insn32 formats 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
 2019-05-24 12:09:22 -07:00
Bastian Koppelmann f2ab172867 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists 
manual decoding in gen_arith() is not necessary with decodetree. For now
the function is called trans_arith as the original gen_arith still
exists. The former will be renamed to gen_arith as soon as the old
gen_arith can be removed.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:40:50 +01:00
Bastian Koppelmann 7a50d3e2ae target/riscv: Move gen_arith_imm() decoding into trans_* functions 
gen_arith_imm() does a lot of decoding manually, which was hard to read
in case of the shift instructions and is not necessary anymore with
decodetree.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:40:50 +01:00
Bastian Koppelmann 4ba79c47a2 target/riscv: Convert RV priv insns to decodetree 
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00
Bastian Koppelmann 97f8b49372 target/riscv: Convert RV32D insns to decodetree 
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00
Bastian Koppelmann 6f0e74ff4b target/riscv: Convert RV32F insns to decodetree 
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00
Bastian Koppelmann 3b77c289ae target/riscv: Convert RV32A insns to decodetree 
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00
Bastian Koppelmann d2e2c1e406 target/riscv: Convert RVXM insns to decodetree 
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00
Bastian Koppelmann 771fbe156a target/riscv: Convert RVXI csr insns to decodetree 
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00
Bastian Koppelmann 0c865e856a target/riscv: Convert RVXI fence insns to decodetree 
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00
Bastian Koppelmann b73a987b09 target/riscv: Convert RVXI arithmetic insns to decodetree 
we cannot remove the call to gen_arith() in decode_RV32_64G() since it
is used to translate multiply instructions.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00
Bastian Koppelmann c1000d4e1b target/riscv: Convert RV32I load/store insns to decodetree 
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00
Bastian Koppelmann 3cca75a6fe target/riscv: Convert RVXI branch insns to decodetree 
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00
Bastian Koppelmann 2a53cff418 target/riscv: Activate decodetree and implemnt LUI & AUIPC 
for now only LUI & AUIPC are decoded and translated. If decodetree fails, we
fall back to the old decoder.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00