Commit Graph

7 Commits

Author SHA1 Message Date
Alex Bennée 16932bb761 semihosting: introduce CONFIG_SEMIHOSTING
There isn't much point building semihosting for platforms that don't
support it. Introduce a new symbol and enable it only for the softmmu
targets that need it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28 10:28:50 +01:00
Paolo Bonzini 3a56c2f36c xtensa-softmmu.mak: express dependencies with Kconfig
%-softmmu.mak only keep boards and optional device
definitions in Kconfig mode.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-07 21:46:19 +01:00
Paolo Bonzini 28ba6bdd2f xtensa: rename CONFIG_XTENSA_FPGA to CONFIG_XTENSA_XTFPGA
Match the symbol name that is used e.g. in Linux (drivers/spi/Kconfig).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-07 21:45:53 +01:00
Ákos Kovács d84929da9a hw/xtensa/Makefile.objs: Build xtensa_sim and xtensa_fpga conditionally
Add the new CONFIG_* values to default-config/xtensa*-softmmu.mak.

Signed-off-by: Ákos Kovács <akoskovacs@gmx.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Message-Id: <20190202072456.6468-17-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-02-05 16:50:20 +01:00
Max Filippov 82b25dc8b0 xtensa_lx60: add FLASH support
LX60 carry 4 Mbyte FLASH and 128 Kbyte SRAM, LX200 carry 16 Mbyte FLASH
and 32 Mbyte SRAM. Either of these memories may be mapped to the system
ROM region.

Select boot from FLASH if -kernel option is not specified, otherwise
boot from SRAM.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2011-11-02 05:05:52 +04:00
Max Filippov 0200db650e target-xtensa: add Avnet LX60/LX110/LX200 boards
These boards carry similar hardware: SDRAM (48M for LX110, 64M for LX60,
96M for LX200), 16 Mbyte FLASH, FPGA, 10/100 Mbps Ethernet PHY and 16550
UART. FPGA may be loaded with almost any Tensilica processor. It is also
used to implement Ethernet MAC, e.g. OpenCores 10/100 Mbps Ethernet MAC
and LED/DIP switches access.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16 10:42:21 +00:00
Max Filippov cfa550c6ac target-xtensa: add target to the configure script
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10 16:57:36 +00:00