mirror of https://gitee.com/openkylin/qemu.git
120 lines
3.8 KiB
C
120 lines
3.8 KiB
C
/*
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* QEMU Intel IGD Passthrough Host Bridge Emulation
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*
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* Copyright (c) 2006 Fabrice Bellard
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/pci_host.h"
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#include "hw/pci-host/i440fx.h"
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#include "qapi/error.h"
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typedef struct {
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uint8_t offset;
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uint8_t len;
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} IGDHostInfo;
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/* Here we just expose minimal host bridge offset subset. */
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static const IGDHostInfo igd_host_bridge_infos[] = {
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{PCI_REVISION_ID, 2},
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{PCI_SUBSYSTEM_VENDOR_ID, 2},
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{PCI_SUBSYSTEM_ID, 2},
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{0x50, 2}, /* SNB: processor graphics control register */
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{0x52, 2}, /* processor graphics control register */
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{0xa4, 4}, /* SNB: graphics base of stolen memory */
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{0xa8, 4}, /* SNB: base of GTT stolen memory */
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};
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static void host_pci_config_read(int pos, int len, uint32_t *val, Error **errp)
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{
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int rc, config_fd;
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/* Access real host bridge. */
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char *path = g_strdup_printf("/sys/bus/pci/devices/%04x:%02x:%02x.%d/%s",
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0, 0, 0, 0, "config");
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config_fd = open(path, O_RDWR);
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if (config_fd < 0) {
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error_setg_errno(errp, errno, "Failed to open: %s", path);
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goto out;
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}
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if (lseek(config_fd, pos, SEEK_SET) != pos) {
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error_setg_errno(errp, errno, "Failed to seek: %s", path);
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goto out_close_fd;
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}
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do {
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rc = read(config_fd, (uint8_t *)val, len);
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} while (rc < 0 && (errno == EINTR || errno == EAGAIN));
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if (rc != len) {
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error_setg_errno(errp, errno, "Failed to read: %s", path);
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}
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out_close_fd:
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close(config_fd);
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out:
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g_free(path);
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}
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static void igd_pt_i440fx_realize(PCIDevice *pci_dev, Error **errp)
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{
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ERRP_GUARD();
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uint32_t val = 0;
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size_t i;
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int pos, len;
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for (i = 0; i < ARRAY_SIZE(igd_host_bridge_infos); i++) {
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pos = igd_host_bridge_infos[i].offset;
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len = igd_host_bridge_infos[i].len;
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host_pci_config_read(pos, len, &val, errp);
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if (*errp) {
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return;
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}
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pci_default_write_config(pci_dev, pos, val, len);
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}
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}
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static void igd_passthrough_i440fx_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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k->realize = igd_pt_i440fx_realize;
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dc->desc = "IGD Passthrough Host bridge";
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}
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static const TypeInfo igd_passthrough_i440fx_info = {
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.name = TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE,
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.parent = TYPE_I440FX_PCI_DEVICE,
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.instance_size = sizeof(PCII440FXState),
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.class_init = igd_passthrough_i440fx_class_init,
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};
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static void igd_pt_i440fx_register_types(void)
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{
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type_register_static(&igd_passthrough_i440fx_info);
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}
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type_init(igd_pt_i440fx_register_types)
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