mirror of https://gitee.com/openkylin/qemu.git
ecbe1de823
Global interrupt enable bit is already saved within the exception handler helper routine. Thus remove extra code in translation routines. Additionally, debug exceptions has always DEBA as base address. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> |
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| README | ||
| TODO | ||
| cpu.h | ||
| exec.h | ||
| helper.c | ||
| helper.h | ||
| machine.c | ||
| op_helper.c | ||
| translate.c | ||
README
LatticeMico32 target -------------------- General ------- All opcodes including the JUART CSRs are supported. JTAG UART --------- JTAG UART is routed to a serial console device. For the current boards it is the second one. Ie to enable it in the qemu virtual console window use the following command line parameters: -serial vc -serial vc This will make serial0 (the lm32_uart) and serial1 (the JTAG UART) available as virtual consoles. Programmatically terminate the emulator ---------------------------------------- Originally neither the LatticeMico32 nor its peripherals support a mechanism to shut down the machine. Emulation aware programs can write to a to a special register within the system control block to shut down the virtual machine. For more details see hw/lm32_sys.c. The lm32-evr is the first BSP which instantiate this model. A (32 bit) write to 0xfff0000 causes a vm shutdown. Special instructions -------------------- The translation recognizes one special instruction to halt the cpu: and r0, r0, r0 On real hardware this instruction is a nop. It is not used by GCC and should (hopefully) not be used within hand-crafted assembly. Insert this instruction in your idle loop to reduce the cpu load on the host. Ignoring the MSB of the address bus ----------------------------------- Some SoC ignores the MSB on the address bus. Thus creating a shadow memory area. As a general rule, 0x00000000-0x7fffffff is cached, whereas 0x80000000-0xffffffff is not cached and used to access IO devices. This behaviour can be enabled with: cpu_lm32_set_phys_msb_ignore(env, 1);