mirror of https://gitee.com/openkylin/qemu.git
141 lines
4.2 KiB
C
141 lines
4.2 KiB
C
/*
|
|
* RISC-V Emulation Helpers for QEMU.
|
|
*
|
|
* Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
|
|
* Copyright (c) 2017-2018 SiFive, Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms and conditions of the GNU General Public License,
|
|
* version 2 or later, as published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
* more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License along with
|
|
* this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#include "qemu/osdep.h"
|
|
#include "qemu/log.h"
|
|
#include "cpu.h"
|
|
#include "qemu/main-loop.h"
|
|
#include "exec/exec-all.h"
|
|
#include "exec/helper-proto.h"
|
|
|
|
/* Exceptions processing helpers */
|
|
void QEMU_NORETURN do_raise_exception_err(CPURISCVState *env,
|
|
uint32_t exception, uintptr_t pc)
|
|
{
|
|
CPUState *cs = CPU(riscv_env_get_cpu(env));
|
|
qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception);
|
|
cs->exception_index = exception;
|
|
cpu_loop_exit_restore(cs, pc);
|
|
}
|
|
|
|
void helper_raise_exception(CPURISCVState *env, uint32_t exception)
|
|
{
|
|
do_raise_exception_err(env, exception, 0);
|
|
}
|
|
|
|
target_ulong helper_csrrw(CPURISCVState *env, target_ulong src,
|
|
target_ulong csr)
|
|
{
|
|
target_ulong val = 0;
|
|
if (riscv_csrrw(env, csr, &val, src, -1) < 0) {
|
|
do_raise_exception_err(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
|
|
}
|
|
return val;
|
|
}
|
|
|
|
target_ulong helper_csrrs(CPURISCVState *env, target_ulong src,
|
|
target_ulong csr, target_ulong rs1_pass)
|
|
{
|
|
target_ulong val = 0;
|
|
if (riscv_csrrw(env, csr, &val, -1, rs1_pass ? src : 0) < 0) {
|
|
do_raise_exception_err(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
|
|
}
|
|
return val;
|
|
}
|
|
|
|
target_ulong helper_csrrc(CPURISCVState *env, target_ulong src,
|
|
target_ulong csr, target_ulong rs1_pass)
|
|
{
|
|
target_ulong val = 0;
|
|
if (riscv_csrrw(env, csr, &val, 0, rs1_pass ? src : 0) < 0) {
|
|
do_raise_exception_err(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
|
|
}
|
|
return val;
|
|
}
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
target_ulong helper_sret(CPURISCVState *env, target_ulong cpu_pc_deb)
|
|
{
|
|
if (!(env->priv >= PRV_S)) {
|
|
do_raise_exception_err(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
|
|
}
|
|
|
|
target_ulong retpc = env->sepc;
|
|
if (!riscv_has_ext(env, RVC) && (retpc & 0x3)) {
|
|
do_raise_exception_err(env, RISCV_EXCP_INST_ADDR_MIS, GETPC());
|
|
}
|
|
|
|
target_ulong mstatus = env->mstatus;
|
|
target_ulong prev_priv = get_field(mstatus, MSTATUS_SPP);
|
|
mstatus = set_field(mstatus,
|
|
env->priv_ver >= PRIV_VERSION_1_10_0 ?
|
|
MSTATUS_SIE : MSTATUS_UIE << prev_priv,
|
|
get_field(mstatus, MSTATUS_SPIE));
|
|
mstatus = set_field(mstatus, MSTATUS_SPIE, 0);
|
|
mstatus = set_field(mstatus, MSTATUS_SPP, PRV_U);
|
|
riscv_set_mode(env, prev_priv);
|
|
env->mstatus = mstatus;
|
|
|
|
return retpc;
|
|
}
|
|
|
|
target_ulong helper_mret(CPURISCVState *env, target_ulong cpu_pc_deb)
|
|
{
|
|
if (!(env->priv >= PRV_M)) {
|
|
do_raise_exception_err(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
|
|
}
|
|
|
|
target_ulong retpc = env->mepc;
|
|
if (!riscv_has_ext(env, RVC) && (retpc & 0x3)) {
|
|
do_raise_exception_err(env, RISCV_EXCP_INST_ADDR_MIS, GETPC());
|
|
}
|
|
|
|
target_ulong mstatus = env->mstatus;
|
|
target_ulong prev_priv = get_field(mstatus, MSTATUS_MPP);
|
|
mstatus = set_field(mstatus,
|
|
env->priv_ver >= PRIV_VERSION_1_10_0 ?
|
|
MSTATUS_MIE : MSTATUS_UIE << prev_priv,
|
|
get_field(mstatus, MSTATUS_MPIE));
|
|
mstatus = set_field(mstatus, MSTATUS_MPIE, 0);
|
|
mstatus = set_field(mstatus, MSTATUS_MPP, PRV_U);
|
|
riscv_set_mode(env, prev_priv);
|
|
env->mstatus = mstatus;
|
|
|
|
return retpc;
|
|
}
|
|
|
|
void helper_wfi(CPURISCVState *env)
|
|
{
|
|
CPUState *cs = CPU(riscv_env_get_cpu(env));
|
|
|
|
cs->halted = 1;
|
|
cs->exception_index = EXCP_HLT;
|
|
cpu_loop_exit(cs);
|
|
}
|
|
|
|
void helper_tlb_flush(CPURISCVState *env)
|
|
{
|
|
RISCVCPU *cpu = riscv_env_get_cpu(env);
|
|
CPUState *cs = CPU(cpu);
|
|
tlb_flush(cs);
|
|
}
|
|
|
|
#endif /* !CONFIG_USER_ONLY */
|