qemu/include/hw/ppc
Greg Kurz bb2d8ab636 spapr: fix LSI interrupt specifiers in the device tree
LoPAPR 1.1 B.6.9.1.2 describes the "#interrupt-cells" property of the
PowerPC External Interrupt Source Controller node as follows:

“#interrupt-cells”

  Standard property name to define the number of cells in an interrupt-
  specifier within an interrupt domain.

  prop-encoded-array: An integer, encoded as with encode-int, that denotes
  the number of cells required to represent an interrupt specifier in its
  child nodes.

  The value of this property for the PowerPC External Interrupt option shall
  be 2. Thus all interrupt specifiers (as used in the standard “interrupts”
  property) shall consist of two cells, each containing an integer encoded
  as with encode-int. The first integer represents the interrupt number the
  second integer is the trigger code: 0 for edge triggered, 1 for level
  triggered.

This patch fixes the interrupt specifiers in the "interrupt-map" property
of the PHB node, that were setting the second cell to 8 (confusion with
IRQ_TYPE_LEVEL_LOW ?) instead of 1.

VIO devices and RTAS event sources use the same format for interrupt
specifiers: while here, we introduce a common helper to handle the
encoding details.

Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
--
v3: - reference public LoPAPR instead of internal PAPR+ in changelog
    - change helper name to spapr_dt_xics_irq()

v2: - drop the erroneous changes to the "interrupts" prop in PCI device nodes
    - introduce a common helper to encode interrupt specifiers
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-12-15 09:49:24 +11:00
..
fdt.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
mac_dbdma.h mac_dbdma: remove DBDMA_init() function 2017-09-27 13:05:41 +10:00
openpic.h ppc: Fix OpenPIC model 2017-09-27 13:05:41 +10:00
pnv.h ppc: pnv: drop PnvChipClass::cpu_model field 2017-10-17 10:34:01 +11:00
pnv_core.h ppc: pnv: drop PnvChipClass::cpu_model field 2017-10-17 10:34:01 +11:00
pnv_lpc.h pnv: Fix build failures on some host platforms 2017-05-11 09:45:15 +10:00
pnv_occ.h pnv: Fix build failures on some host platforms 2017-05-11 09:45:15 +10:00
pnv_psi.h ppc/pnv: Remove unused XICSState reference 2017-07-17 15:07:05 +10:00
pnv_xscom.h ppc/pnv: Improve macro parenthesization 2017-09-27 13:05:41 +10:00
ppc.h ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model() 2017-10-17 10:34:00 +11:00
ppc4xx.h ppc4xx: Make MAL emulation more generic 2017-09-08 09:30:55 +10:00
ppc_e500.h intc/openpic: Build openpic only once 2013-07-09 21:33:02 +02:00
spapr.h spapr: fix LSI interrupt specifiers in the device tree 2017-12-15 09:49:24 +11:00
spapr_cpu_core.h spapr_cpu_core: instantiate CPUs separately 2017-12-15 09:49:23 +11:00
spapr_drc.h hw/ppc: CAS reset on early device hotplug 2017-09-08 09:30:54 +10:00
spapr_ovec.h ppc/xive: fix OV5_XIVE_EXPLOIT bits 2017-09-15 10:29:48 +10:00
spapr_rtas.h tests: add RTAS command in the protocol 2016-09-23 10:29:40 +10:00
spapr_vio.h spapr: introduce a spapr_qirq() helper 2017-12-15 09:49:24 +11:00
xics.h spapr: introduce a spapr_qirq() helper 2017-12-15 09:49:24 +11:00