mirror of https://gitee.com/openkylin/qemu.git
b798068d51
cppcheck report:
target-lm32/translate.c:587: style:
Variable 't0' is assigned a value that is never used
target-lm32/translate.c:588: style:
Variable 'l1' is assigned a value that is never used
Remove both variables. Please check whether that is the correct solution.
Cc: Michael Walle <michael@walle.cc>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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| .. | ||
| README | ||
| TODO | ||
| cpu.h | ||
| exec.h | ||
| helper.c | ||
| helper.h | ||
| machine.c | ||
| op_helper.c | ||
| translate.c | ||
README
LatticeMico32 target -------------------- General ------- All opcodes including the JUART CSRs are supported. JTAG UART --------- JTAG UART is routed to a serial console device. For the current boards it is the second one. Ie to enable it in the qemu virtual console window use the following command line parameters: -serial vc -serial vc This will make serial0 (the lm32_uart) and serial1 (the JTAG UART) available as virtual consoles. Programmatically terminate the emulator ---------------------------------------- Originally neither the LatticeMico32 nor its peripherals support a mechanism to shut down the machine. Emulation aware programs can write to a to a special register within the system control block to shut down the virtual machine. For more details see hw/lm32_sys.c. The lm32-evr is the first BSP which instantiate this model. A (32 bit) write to 0xfff0000 causes a vm shutdown. Special instructions -------------------- The translation recognizes one special instruction to halt the cpu: and r0, r0, r0 On real hardware this instruction is a nop. It is not used by GCC and should (hopefully) not be used within hand-crafted assembly. Insert this instruction in your idle loop to reduce the cpu load on the host. Ignoring the MSB of the address bus ----------------------------------- Some SoC ignores the MSB on the address bus. Thus creating a shadow memory area. As a general rule, 0x00000000-0x7fffffff is cached, whereas 0x80000000-0xffffffff is not cached and used to access IO devices. This behaviour can be enabled with: cpu_lm32_set_phys_msb_ignore(env, 1);