mirror of https://gitee.com/openkylin/qemu.git
486 lines
19 KiB
Python
Executable File
486 lines
19 KiB
Python
Executable File
#!/usr/bin/env python3
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##
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## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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import sys
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import re
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import string
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import hex_common
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##
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## Helpers for gen_tcg_func
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##
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def gen_decl_ea_tcg(f, tag):
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if ('A_CONDEXEC' in hex_common.attribdict[tag] or
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'A_LOAD' in hex_common.attribdict[tag]):
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f.write(" TCGv EA = tcg_temp_local_new();\n")
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else:
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f.write(" TCGv EA = tcg_temp_new();\n")
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def gen_free_ea_tcg(f):
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f.write(" tcg_temp_free(EA);\n")
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def genptr_decl_pair_writable(f, tag, regtype, regid, regno):
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regN="%s%sN" % (regtype,regid)
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f.write(" TCGv_i64 %s%sV = tcg_temp_local_new_i64();\n" % \
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(regtype, regid))
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if (regtype == "C"):
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f.write(" const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
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(regN, regno))
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else:
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f.write(" const int %s = insn->regno[%d];\n" % (regN, regno))
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if ('A_CONDEXEC' in hex_common.attribdict[tag]):
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f.write(" if (!is_preloaded(ctx, %s)) {\n" % regN)
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f.write(" tcg_gen_mov_tl(hex_new_value[%s], hex_gpr[%s]);\n" % \
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(regN, regN))
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f.write(" }\n")
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f.write(" if (!is_preloaded(ctx, %s + 1)) {\n" % regN)
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f.write(" tcg_gen_mov_tl(hex_new_value[%s + 1], hex_gpr[%s + 1]);\n" % \
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(regN, regN))
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f.write(" }\n")
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def genptr_decl_writable(f, tag, regtype, regid, regno):
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regN="%s%sN" % (regtype,regid)
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f.write(" TCGv %s%sV = tcg_temp_local_new();\n" % \
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(regtype, regid))
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if (regtype == "C"):
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f.write(" const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
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(regN, regno))
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else:
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f.write(" const int %s = insn->regno[%d];\n" % (regN, regno))
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if ('A_CONDEXEC' in hex_common.attribdict[tag]):
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f.write(" if (!is_preloaded(ctx, %s)) {\n" % regN)
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f.write(" tcg_gen_mov_tl(hex_new_value[%s], hex_gpr[%s]);\n" % \
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(regN, regN))
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f.write(" }\n")
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def genptr_decl(f, tag, regtype, regid, regno):
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regN="%s%sN" % (regtype,regid)
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if (regtype == "R"):
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if (regid in {"ss", "tt"}):
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f.write(" TCGv_i64 %s%sV = tcg_temp_local_new_i64();\n" % \
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(regtype, regid))
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f.write(" const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"dd", "ee", "xx", "yy"}):
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genptr_decl_pair_writable(f, tag, regtype, regid, regno)
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elif (regid in {"s", "t", "u", "v"}):
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f.write(" TCGv %s%sV = hex_gpr[insn->regno[%d]];\n" % \
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(regtype, regid, regno))
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elif (regid in {"d", "e", "x", "y"}):
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genptr_decl_writable(f, tag, regtype, regid, regno)
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "P"):
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if (regid in {"s", "t", "u", "v"}):
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f.write(" TCGv %s%sV = hex_pred[insn->regno[%d]];\n" % \
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(regtype, regid, regno))
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elif (regid in {"d", "e", "x"}):
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genptr_decl_writable(f, tag, regtype, regid, regno)
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "C"):
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if (regid == "ss"):
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f.write(" TCGv_i64 %s%sV = tcg_temp_local_new_i64();\n" % \
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(regtype, regid))
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f.write(" const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
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(regN, regno))
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elif (regid == "dd"):
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genptr_decl_pair_writable(f, tag, regtype, regid, regno)
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elif (regid == "s"):
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f.write(" TCGv %s%sV = tcg_temp_local_new();\n" % \
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(regtype, regid))
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f.write(" const int %s%sN = insn->regno[%d] + HEX_REG_SA0;\n" % \
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(regtype, regid, regno))
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elif (regid == "d"):
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genptr_decl_writable(f, tag, regtype, regid, regno)
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "M"):
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if (regid == "u"):
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f.write(" const int %s%sN = insn->regno[%d];\n"% \
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(regtype, regid, regno))
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f.write(" TCGv %s%sV = hex_gpr[%s%sN + HEX_REG_M0];\n" % \
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(regtype, regid, regtype, regid))
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else:
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print("Bad register parse: ", regtype, regid)
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else:
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print("Bad register parse: ", regtype, regid)
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def genptr_decl_new(f,regtype,regid,regno):
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if (regtype == "N"):
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if (regid in {"s", "t"}):
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f.write(" TCGv %s%sN = hex_new_value[insn->regno[%d]];\n" % \
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(regtype, regid, regno))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "P"):
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if (regid in {"t", "u", "v"}):
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f.write(" TCGv %s%sN = hex_new_pred_value[insn->regno[%d]];\n" % \
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(regtype, regid, regno))
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else:
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print("Bad register parse: ", regtype, regid)
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else:
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print("Bad register parse: ", regtype, regid)
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def genptr_decl_opn(f, tag, regtype, regid, toss, numregs, i):
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if (hex_common.is_pair(regid)):
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genptr_decl(f, tag, regtype, regid, i)
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elif (hex_common.is_single(regid)):
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if hex_common.is_old_val(regtype, regid, tag):
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genptr_decl(f,tag, regtype, regid, i)
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elif hex_common.is_new_val(regtype, regid, tag):
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genptr_decl_new(f,regtype,regid,i)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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def genptr_decl_imm(f,immlett):
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if (immlett.isupper()):
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i = 1
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else:
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i = 0
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f.write(" int %s = insn->immed[%d];\n" % \
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(hex_common.imm_name(immlett), i))
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def genptr_free(f,regtype,regid,regno):
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if (regtype == "R"):
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if (regid in {"dd", "ss", "tt", "xx", "yy"}):
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f.write(" tcg_temp_free_i64(%s%sV);\n" % (regtype, regid))
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elif (regid in {"d", "e", "x", "y"}):
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f.write(" tcg_temp_free(%s%sV);\n" % (regtype, regid))
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elif (regid not in {"s", "t", "u", "v"}):
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print("Bad register parse: ",regtype,regid)
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elif (regtype == "P"):
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if (regid in {"d", "e", "x"}):
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f.write(" tcg_temp_free(%s%sV);\n" % (regtype, regid))
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elif (regid not in {"s", "t", "u", "v"}):
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print("Bad register parse: ",regtype,regid)
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elif (regtype == "C"):
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if (regid in {"dd", "ss"}):
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f.write(" tcg_temp_free_i64(%s%sV);\n" % (regtype, regid))
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elif (regid in {"d", "s"}):
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f.write(" tcg_temp_free(%s%sV);\n" % (regtype, regid))
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else:
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print("Bad register parse: ",regtype,regid)
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elif (regtype == "M"):
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if (regid != "u"):
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print("Bad register parse: ", regtype, regid)
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else:
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print("Bad register parse: ", regtype, regid)
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def genptr_free_new(f,regtype,regid,regno):
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if (regtype == "N"):
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if (regid not in {"s", "t"}):
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "P"):
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if (regid not in {"t", "u", "v"}):
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print("Bad register parse: ", regtype, regid)
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else:
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print("Bad register parse: ", regtype, regid)
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def genptr_free_opn(f,regtype,regid,i,tag):
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if (hex_common.is_pair(regid)):
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genptr_free(f,regtype,regid,i)
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elif (hex_common.is_single(regid)):
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if hex_common.is_old_val(regtype, regid, tag):
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genptr_free(f,regtype,regid,i)
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elif hex_common.is_new_val(regtype, regid, tag):
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genptr_free_new(f,regtype,regid,i)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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def genptr_src_read(f,regtype,regid):
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if (regtype == "R"):
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if (regid in {"ss", "tt", "xx", "yy"}):
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f.write(" tcg_gen_concat_i32_i64(%s%sV, hex_gpr[%s%sN],\n" % \
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(regtype, regid, regtype, regid))
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f.write(" hex_gpr[%s%sN + 1]);\n" % \
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(regtype, regid))
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elif (regid in {"x", "y"}):
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f.write(" tcg_gen_mov_tl(%s%sV, hex_gpr[%s%sN]);\n" % \
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(regtype,regid,regtype,regid))
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elif (regid not in {"s", "t", "u", "v"}):
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "P"):
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if (regid == "x"):
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f.write(" tcg_gen_mov_tl(%s%sV, hex_pred[%s%sN]);\n" % \
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(regtype, regid, regtype, regid))
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elif (regid not in {"s", "t", "u", "v"}):
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "C"):
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if (regid == "ss"):
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f.write(" gen_read_ctrl_reg_pair(ctx, %s%sN, %s%sV);\n" % \
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(regtype, regid, regtype, regid))
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elif (regid == "s"):
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f.write(" gen_read_ctrl_reg(ctx, %s%sN, %s%sV);\n" % \
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(regtype, regid, regtype, regid))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "M"):
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if (regid != "u"):
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print("Bad register parse: ", regtype, regid)
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else:
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print("Bad register parse: ", regtype, regid)
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def genptr_src_read_new(f,regtype,regid):
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if (regtype == "N"):
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if (regid not in {"s", "t"}):
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "P"):
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if (regid not in {"t", "u", "v"}):
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print("Bad register parse: ", regtype, regid)
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else:
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print("Bad register parse: ", regtype, regid)
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def genptr_src_read_opn(f,regtype,regid,tag):
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if (hex_common.is_pair(regid)):
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genptr_src_read(f,regtype,regid)
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elif (hex_common.is_single(regid)):
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if hex_common.is_old_val(regtype, regid, tag):
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genptr_src_read(f,regtype,regid)
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elif hex_common.is_new_val(regtype, regid, tag):
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genptr_src_read_new(f,regtype,regid)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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def gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i):
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if (i > 0): f.write(", ")
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if (hex_common.is_pair(regid)):
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f.write("%s%sV" % (regtype,regid))
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elif (hex_common.is_single(regid)):
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if hex_common.is_old_val(regtype, regid, tag):
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f.write("%s%sV" % (regtype,regid))
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elif hex_common.is_new_val(regtype, regid, tag):
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f.write("%s%sN" % (regtype,regid))
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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def gen_helper_decl_imm(f,immlett):
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f.write(" TCGv tcgv_%s = tcg_const_tl(%s);\n" % \
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(hex_common.imm_name(immlett), hex_common.imm_name(immlett)))
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def gen_helper_call_imm(f,immlett):
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f.write(", tcgv_%s" % hex_common.imm_name(immlett))
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def gen_helper_free_imm(f,immlett):
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f.write(" tcg_temp_free(tcgv_%s);\n" % hex_common.imm_name(immlett))
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def genptr_dst_write_pair(f, tag, regtype, regid):
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if ('A_CONDEXEC' in hex_common.attribdict[tag]):
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f.write(" gen_log_predicated_reg_write_pair(%s%sN, %s%sV, insn->slot);\n" % \
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(regtype, regid, regtype, regid))
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else:
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f.write(" gen_log_reg_write_pair(%s%sN, %s%sV);\n" % \
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(regtype, regid, regtype, regid))
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f.write(" ctx_log_reg_write_pair(ctx, %s%sN);\n" % \
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(regtype, regid))
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def genptr_dst_write(f, tag, regtype, regid):
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if (regtype == "R"):
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if (regid in {"dd", "xx", "yy"}):
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genptr_dst_write_pair(f, tag, regtype, regid)
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elif (regid in {"d", "e", "x", "y"}):
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if ('A_CONDEXEC' in hex_common.attribdict[tag]):
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f.write(" gen_log_predicated_reg_write(%s%sN, %s%sV,\n" % \
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(regtype, regid, regtype, regid))
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f.write(" insn->slot);\n")
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else:
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f.write(" gen_log_reg_write(%s%sN, %s%sV);\n" % \
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(regtype, regid, regtype, regid))
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f.write(" ctx_log_reg_write(ctx, %s%sN);\n" % \
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(regtype, regid))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "P"):
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if (regid in {"d", "e", "x"}):
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f.write(" gen_log_pred_write(ctx, %s%sN, %s%sV);\n" % \
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(regtype, regid, regtype, regid))
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f.write(" ctx_log_pred_write(ctx, %s%sN);\n" % \
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(regtype, regid))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "C"):
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if (regid == "dd"):
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f.write(" gen_write_ctrl_reg_pair(ctx, %s%sN, %s%sV);\n" % \
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(regtype, regid, regtype, regid))
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elif (regid == "d"):
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f.write(" gen_write_ctrl_reg(ctx, %s%sN, %s%sV);\n" % \
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(regtype, regid, regtype, regid))
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else:
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print("Bad register parse: ", regtype, regid)
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else:
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print("Bad register parse: ", regtype, regid)
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def genptr_dst_write_opn(f,regtype, regid, tag):
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if (hex_common.is_pair(regid)):
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genptr_dst_write(f, tag, regtype, regid)
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elif (hex_common.is_single(regid)):
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genptr_dst_write(f, tag, regtype, regid)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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##
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## Generate the TCG code to call the helper
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## For A2_add: Rd32=add(Rs32,Rt32), { RdV=RsV+RtV;}
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## We produce:
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## static void generate_A2_add()
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## CPUHexagonState *env
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## DisasContext *ctx,
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## Insn *insn,
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## Packet *pkt)
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## {
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## TCGv RdV = tcg_temp_local_new();
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## const int RdN = insn->regno[0];
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## TCGv RsV = hex_gpr[insn->regno[1]];
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## TCGv RtV = hex_gpr[insn->regno[2]];
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## <GEN>
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## gen_log_reg_write(RdN, RdV);
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## ctx_log_reg_write(ctx, RdN);
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## tcg_temp_free(RdV);
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## }
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##
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## where <GEN> depends on hex_common.skip_qemu_helper(tag)
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## if hex_common.skip_qemu_helper(tag) is True
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## <GEN> is fGEN_TCG_A2_add({ RdV=RsV+RtV;});
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## if hex_common.skip_qemu_helper(tag) is False
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## <GEN> is gen_helper_A2_add(RdV, cpu_env, RsV, RtV);
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##
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def gen_tcg_func(f, tag, regs, imms):
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f.write("static void generate_%s(\n" %tag)
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f.write(" CPUHexagonState *env,\n")
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f.write(" DisasContext *ctx,\n")
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f.write(" Insn *insn,\n")
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f.write(" Packet *pkt)\n")
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f.write('{\n')
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if hex_common.need_ea(tag): gen_decl_ea_tcg(f, tag)
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i=0
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## Declare all the operands (regs and immediates)
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for regtype,regid,toss,numregs in regs:
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genptr_decl_opn(f, tag, regtype, regid, toss, numregs, i)
|
|
i += 1
|
|
for immlett,bits,immshift in imms:
|
|
genptr_decl_imm(f,immlett)
|
|
|
|
if 'A_PRIV' in hex_common.attribdict[tag]:
|
|
f.write(' fCHECKFORPRIV();\n')
|
|
if 'A_GUEST' in hex_common.attribdict[tag]:
|
|
f.write(' fCHECKFORGUEST();\n')
|
|
|
|
## Read all the inputs
|
|
for regtype,regid,toss,numregs in regs:
|
|
if (hex_common.is_read(regid)):
|
|
genptr_src_read_opn(f,regtype,regid,tag)
|
|
|
|
if ( hex_common.skip_qemu_helper(tag) ):
|
|
f.write(" fGEN_TCG_%s(%s);\n" % (tag, hex_common.semdict[tag]))
|
|
else:
|
|
## Generate the call to the helper
|
|
for immlett,bits,immshift in imms:
|
|
gen_helper_decl_imm(f,immlett)
|
|
if hex_common.need_part1(tag):
|
|
f.write(" TCGv part1 = tcg_const_tl(insn->part1);\n")
|
|
if hex_common.need_slot(tag):
|
|
f.write(" TCGv slot = tcg_const_tl(insn->slot);\n")
|
|
f.write(" gen_helper_%s(" % (tag))
|
|
i=0
|
|
## If there is a scalar result, it is the return type
|
|
for regtype,regid,toss,numregs in regs:
|
|
if (hex_common.is_written(regid)):
|
|
gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i)
|
|
i += 1
|
|
if (i > 0): f.write(", ")
|
|
f.write("cpu_env")
|
|
i=1
|
|
for regtype,regid,toss,numregs in regs:
|
|
if (hex_common.is_read(regid)):
|
|
gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i)
|
|
i += 1
|
|
for immlett,bits,immshift in imms:
|
|
gen_helper_call_imm(f,immlett)
|
|
|
|
if hex_common.need_slot(tag): f.write(", slot")
|
|
if hex_common.need_part1(tag): f.write(", part1" )
|
|
f.write(");\n")
|
|
if hex_common.need_slot(tag):
|
|
f.write(" tcg_temp_free(slot);\n")
|
|
if hex_common.need_part1(tag):
|
|
f.write(" tcg_temp_free(part1);\n")
|
|
for immlett,bits,immshift in imms:
|
|
gen_helper_free_imm(f,immlett)
|
|
|
|
## Write all the outputs
|
|
for regtype,regid,toss,numregs in regs:
|
|
if (hex_common.is_written(regid)):
|
|
genptr_dst_write_opn(f,regtype, regid, tag)
|
|
|
|
## Free all the operands (regs and immediates)
|
|
if hex_common.need_ea(tag): gen_free_ea_tcg(f)
|
|
for regtype,regid,toss,numregs in regs:
|
|
genptr_free_opn(f,regtype,regid,i,tag)
|
|
i += 1
|
|
|
|
f.write("}\n\n")
|
|
|
|
def gen_def_tcg_func(f, tag, tagregs, tagimms):
|
|
regs = tagregs[tag]
|
|
imms = tagimms[tag]
|
|
|
|
gen_tcg_func(f, tag, regs, imms)
|
|
|
|
def main():
|
|
hex_common.read_semantics_file(sys.argv[1])
|
|
hex_common.read_attribs_file(sys.argv[2])
|
|
hex_common.read_overrides_file(sys.argv[3])
|
|
hex_common.calculate_attribs()
|
|
tagregs = hex_common.get_tagregs()
|
|
tagimms = hex_common.get_tagimms()
|
|
|
|
with open(sys.argv[4], 'w') as f:
|
|
f.write("#ifndef HEXAGON_TCG_FUNCS_H\n")
|
|
f.write("#define HEXAGON_TCG_FUNCS_H\n\n")
|
|
|
|
for tag in hex_common.tags:
|
|
## Skip the priv instructions
|
|
if ( "A_PRIV" in hex_common.attribdict[tag] ) :
|
|
continue
|
|
## Skip the guest instructions
|
|
if ( "A_GUEST" in hex_common.attribdict[tag] ) :
|
|
continue
|
|
## Skip the diag instructions
|
|
if ( tag == "Y6_diag" ) :
|
|
continue
|
|
if ( tag == "Y6_diag0" ) :
|
|
continue
|
|
if ( tag == "Y6_diag1" ) :
|
|
continue
|
|
|
|
gen_def_tcg_func(f, tag, tagregs, tagimms)
|
|
|
|
f.write("#endif /* HEXAGON_TCG_FUNCS_H */\n")
|
|
|
|
if __name__ == "__main__":
|
|
main()
|