mirror of https://gitee.com/openkylin/qemu.git
208 lines
6.5 KiB
C
208 lines
6.5 KiB
C
/*
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* QEMU x86 ISA testdev
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*
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* Copyright (c) 2012 Avi Kivity, Gerd Hoffmann, Marcelo Tosatti
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/*
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* This device is used to test KVM features specific to the x86 port, such
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* as emulation, power management, interrupt routing, among others. It's meant
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* to be used like:
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*
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* qemu-system-x86_64 -device pc-testdev -serial stdio \
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* -device isa-debug-exit,iobase=0xf4,iosize=0x4 \
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* -kernel /home/lmr/Code/virt-test.git/kvm/unittests/msr.flat
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*
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* Where msr.flat is one of the KVM unittests, present on a separate repo,
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* git://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
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*/
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#include "config-host.h"
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#if defined(CONFIG_POSIX)
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#include <sys/mman.h>
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#endif
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#include "hw/hw.h"
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#include "hw/qdev.h"
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#include "hw/isa/isa.h"
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#define IOMEM_LEN 0x10000
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typedef struct PCTestdev {
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ISADevice parent_obj;
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MemoryRegion ioport;
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MemoryRegion ioport_byte;
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MemoryRegion flush;
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MemoryRegion irq;
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MemoryRegion iomem;
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uint32_t ioport_data;
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char iomem_buf[IOMEM_LEN];
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} PCTestdev;
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#define TYPE_TESTDEV "pc-testdev"
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#define TESTDEV(obj) \
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OBJECT_CHECK(PCTestdev, (obj), TYPE_TESTDEV)
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static void test_irq_line(void *opaque, hwaddr addr, uint64_t data,
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unsigned len)
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{
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PCTestdev *dev = opaque;
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ISADevice *isa = ISA_DEVICE(dev);
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qemu_set_irq(isa_get_irq(isa, addr), !!data);
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}
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static const MemoryRegionOps test_irq_ops = {
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.write = test_irq_line,
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.valid.min_access_size = 1,
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.valid.max_access_size = 1,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void test_ioport_write(void *opaque, hwaddr addr, uint64_t data,
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unsigned len)
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{
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PCTestdev *dev = opaque;
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int bits = len * 8;
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int start_bit = (addr & 3) * 8;
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uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
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dev->ioport_data &= ~mask;
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dev->ioport_data |= data << start_bit;
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}
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static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned len)
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{
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PCTestdev *dev = opaque;
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int bits = len * 8;
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int start_bit = (addr & 3) * 8;
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uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
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return (dev->ioport_data & mask) >> start_bit;
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}
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static const MemoryRegionOps test_ioport_ops = {
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.read = test_ioport_read,
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.write = test_ioport_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static const MemoryRegionOps test_ioport_byte_ops = {
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.read = test_ioport_read,
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.write = test_ioport_write,
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.valid.min_access_size = 1,
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.valid.max_access_size = 4,
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.impl.min_access_size = 1,
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.impl.max_access_size = 1,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void test_flush_page(void *opaque, hwaddr addr, uint64_t data,
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unsigned len)
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{
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hwaddr page = 4096;
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void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0);
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/* We might not be able to get the full page, only mprotect what we actually
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have mapped */
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#if defined(CONFIG_POSIX)
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mprotect(a, page, PROT_NONE);
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mprotect(a, page, PROT_READ|PROT_WRITE);
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#endif
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cpu_physical_memory_unmap(a, page, 0, 0);
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}
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static const MemoryRegionOps test_flush_ops = {
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.write = test_flush_page,
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.valid.min_access_size = 4,
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.valid.max_access_size = 4,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static uint64_t test_iomem_read(void *opaque, hwaddr addr, unsigned len)
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{
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PCTestdev *dev = opaque;
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uint64_t ret = 0;
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memcpy(&ret, &dev->iomem_buf[addr], len);
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return ret;
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}
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static void test_iomem_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned len)
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{
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PCTestdev *dev = opaque;
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memcpy(&dev->iomem_buf[addr], &val, len);
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dev->iomem_buf[addr] = val;
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}
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static const MemoryRegionOps test_iomem_ops = {
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.read = test_iomem_read,
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.write = test_iomem_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void testdev_realizefn(DeviceState *d, Error **errp)
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{
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ISADevice *isa = ISA_DEVICE(d);
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PCTestdev *dev = TESTDEV(d);
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MemoryRegion *mem = isa_address_space(isa);
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MemoryRegion *io = isa_address_space_io(isa);
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memory_region_init_io(&dev->ioport, OBJECT(dev), &test_ioport_ops, dev,
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"pc-testdev-ioport", 4);
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memory_region_init_io(&dev->ioport_byte, OBJECT(dev),
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&test_ioport_byte_ops, dev,
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"pc-testdev-ioport-byte", 4);
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memory_region_init_io(&dev->flush, OBJECT(dev), &test_flush_ops, dev,
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"pc-testdev-flush-page", 4);
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memory_region_init_io(&dev->irq, OBJECT(dev), &test_irq_ops, dev,
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"pc-testdev-irq-line", 24);
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memory_region_init_io(&dev->iomem, OBJECT(dev), &test_iomem_ops, dev,
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"pc-testdev-iomem", IOMEM_LEN);
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memory_region_add_subregion(io, 0xe0, &dev->ioport);
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memory_region_add_subregion(io, 0xe4, &dev->flush);
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memory_region_add_subregion(io, 0xe8, &dev->ioport_byte);
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memory_region_add_subregion(io, 0x2000, &dev->irq);
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memory_region_add_subregion(mem, 0xff000000, &dev->iomem);
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}
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static void testdev_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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set_bit(DEVICE_CATEGORY_MISC, dc->categories);
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dc->realize = testdev_realizefn;
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}
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static const TypeInfo testdev_info = {
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.name = TYPE_TESTDEV,
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(PCTestdev),
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.class_init = testdev_class_init,
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};
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static void testdev_register_types(void)
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{
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type_register_static(&testdev_info);
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}
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type_init(testdev_register_types)
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