mirror of https://gitee.com/openkylin/qemu.git
317 lines
8.4 KiB
Python
317 lines
8.4 KiB
Python
# -*- Mode: Python -*-
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# vim: filetype=python
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#
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# This work is licensed under the terms of the GNU GPL, version 2 or later.
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# See the COPYING file in the top-level directory.
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# SPDX-License-Identifier: GPL-2.0-or-later
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##
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# = PCI
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##
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##
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# @PciMemoryRange:
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#
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# A PCI device memory region
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#
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# @base: the starting address (guest physical)
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#
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# @limit: the ending address (guest physical)
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#
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# Since: 0.14
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##
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{ 'struct': 'PciMemoryRange', 'data': {'base': 'int', 'limit': 'int'} }
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##
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# @PciMemoryRegion:
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#
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# Information about a PCI device I/O region.
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#
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# @bar: the index of the Base Address Register for this region
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#
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# @type: - 'io' if the region is a PIO region
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# - 'memory' if the region is a MMIO region
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#
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# @size: memory size
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#
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# @prefetch: if @type is 'memory', true if the memory is prefetchable
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#
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# @mem_type_64: if @type is 'memory', true if the BAR is 64-bit
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#
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# Since: 0.14
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##
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{ 'struct': 'PciMemoryRegion',
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'data': {'bar': 'int', 'type': 'str', 'address': 'int', 'size': 'int',
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'*prefetch': 'bool', '*mem_type_64': 'bool' } }
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##
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# @PciBusInfo:
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#
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# Information about a bus of a PCI Bridge device
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#
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# @number: primary bus interface number. This should be the number of the
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# bus the device resides on.
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#
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# @secondary: secondary bus interface number. This is the number of the
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# main bus for the bridge
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#
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# @subordinate: This is the highest number bus that resides below the
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# bridge.
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#
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# @io_range: The PIO range for all devices on this bridge
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#
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# @memory_range: The MMIO range for all devices on this bridge
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#
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# @prefetchable_range: The range of prefetchable MMIO for all devices on
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# this bridge
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#
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# Since: 2.4
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##
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{ 'struct': 'PciBusInfo',
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'data': {'number': 'int', 'secondary': 'int', 'subordinate': 'int',
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'io_range': 'PciMemoryRange',
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'memory_range': 'PciMemoryRange',
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'prefetchable_range': 'PciMemoryRange' } }
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##
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# @PciBridgeInfo:
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#
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# Information about a PCI Bridge device
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#
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# @bus: information about the bus the device resides on
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#
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# @devices: a list of @PciDeviceInfo for each device on this bridge
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#
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# Since: 0.14
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##
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{ 'struct': 'PciBridgeInfo',
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'data': {'bus': 'PciBusInfo', '*devices': ['PciDeviceInfo']} }
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##
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# @PciDeviceClass:
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#
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# Information about the Class of a PCI device
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#
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# @desc: a string description of the device's class
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#
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# @class: the class code of the device
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#
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# Since: 2.4
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##
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{ 'struct': 'PciDeviceClass',
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'data': {'*desc': 'str', 'class': 'int'} }
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##
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# @PciDeviceId:
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#
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# Information about the Id of a PCI device
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#
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# @device: the PCI device id
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#
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# @vendor: the PCI vendor id
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#
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# @subsystem: the PCI subsystem id (since 3.1)
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#
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# @subsystem-vendor: the PCI subsystem vendor id (since 3.1)
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#
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# Since: 2.4
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##
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{ 'struct': 'PciDeviceId',
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'data': {'device': 'int', 'vendor': 'int', '*subsystem': 'int',
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'*subsystem-vendor': 'int'} }
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##
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# @PciDeviceInfo:
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#
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# Information about a PCI device
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#
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# @bus: the bus number of the device
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#
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# @slot: the slot the device is located in
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#
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# @function: the function of the slot used by the device
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#
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# @class_info: the class of the device
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#
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# @id: the PCI device id
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#
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# @irq: if an IRQ is assigned to the device, the IRQ number
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#
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# @irq_pin: the IRQ pin, zero means no IRQ (since 5.1)
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#
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# @qdev_id: the device name of the PCI device
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#
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# @pci_bridge: if the device is a PCI bridge, the bridge information
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#
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# @regions: a list of the PCI I/O regions associated with the device
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#
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# Notes: the contents of @class_info.desc are not stable and should only be
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# treated as informational.
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#
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# Since: 0.14
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##
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{ 'struct': 'PciDeviceInfo',
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'data': {'bus': 'int', 'slot': 'int', 'function': 'int',
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'class_info': 'PciDeviceClass', 'id': 'PciDeviceId',
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'*irq': 'int', 'irq_pin': 'int', 'qdev_id': 'str',
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'*pci_bridge': 'PciBridgeInfo', 'regions': ['PciMemoryRegion'] }}
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##
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# @PciInfo:
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#
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# Information about a PCI bus
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#
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# @bus: the bus index
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#
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# @devices: a list of devices on this bus
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#
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# Since: 0.14
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##
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{ 'struct': 'PciInfo', 'data': {'bus': 'int', 'devices': ['PciDeviceInfo']} }
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##
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# @query-pci:
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#
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# Return information about the PCI bus topology of the guest.
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#
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# Returns: a list of @PciInfo for each PCI bus. Each bus is
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# represented by a json-object, which has a key with a json-array of
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# all PCI devices attached to it. Each device is represented by a
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# json-object.
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#
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# Since: 0.14
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#
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# Example:
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#
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# -> { "execute": "query-pci" }
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# <- { "return": [
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# {
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# "bus": 0,
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# "devices": [
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# {
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# "bus": 0,
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# "qdev_id": "",
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# "slot": 0,
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# "class_info": {
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# "class": 1536,
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# "desc": "Host bridge"
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# },
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# "id": {
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# "device": 32902,
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# "vendor": 4663
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# },
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# "function": 0,
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# "regions": [
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# ]
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# },
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# {
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# "bus": 0,
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# "qdev_id": "",
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# "slot": 1,
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# "class_info": {
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# "class": 1537,
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# "desc": "ISA bridge"
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# },
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# "id": {
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# "device": 32902,
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# "vendor": 28672
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# },
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# "function": 0,
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# "regions": [
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# ]
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# },
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# {
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# "bus": 0,
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# "qdev_id": "",
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# "slot": 1,
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# "class_info": {
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# "class": 257,
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# "desc": "IDE controller"
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# },
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# "id": {
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# "device": 32902,
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# "vendor": 28688
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# },
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# "function": 1,
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# "regions": [
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# {
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# "bar": 4,
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# "size": 16,
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# "address": 49152,
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# "type": "io"
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# }
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# ]
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# },
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# {
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# "bus": 0,
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# "qdev_id": "",
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# "slot": 2,
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# "class_info": {
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# "class": 768,
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# "desc": "VGA controller"
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# },
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# "id": {
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# "device": 4115,
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# "vendor": 184
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# },
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# "function": 0,
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# "regions": [
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# {
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# "prefetch": true,
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# "mem_type_64": false,
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# "bar": 0,
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# "size": 33554432,
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# "address": 4026531840,
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# "type": "memory"
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# },
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# {
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# "prefetch": false,
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# "mem_type_64": false,
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# "bar": 1,
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# "size": 4096,
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# "address": 4060086272,
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# "type": "memory"
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# },
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# {
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# "prefetch": false,
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# "mem_type_64": false,
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# "bar": 6,
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# "size": 65536,
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# "address": -1,
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# "type": "memory"
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# }
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# ]
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# },
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# {
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# "bus": 0,
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# "qdev_id": "",
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# "irq": 11,
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# "slot": 4,
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# "class_info": {
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# "class": 1280,
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# "desc": "RAM controller"
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# },
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# "id": {
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# "device": 6900,
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# "vendor": 4098
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# },
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# "function": 0,
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# "regions": [
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# {
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# "bar": 0,
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# "size": 32,
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# "address": 49280,
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# "type": "io"
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# }
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# ]
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# }
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# ]
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# }
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# ]
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# }
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#
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# Note: This example has been shortened as the real response is too long.
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#
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##
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{ 'command': 'query-pci', 'returns': ['PciInfo'] }
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