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Peter Maydell d8276573da Add CPUClass::tlb_fill. 
Improve tlb_vaddr_to_host for use by ARM SVE no-fault loads.
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Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510' into staging

Add CPUClass::tlb_fill.
Improve tlb_vaddr_to_host for use by ARM SVE no-fault loads.

# gpg: Signature made Fri 10 May 2019 19:48:37 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20190510: (27 commits)
  tcg: Use tlb_fill probe from tlb_vaddr_to_host
  tcg: Remove CPUClass::handle_mmu_fault
  tcg: Use CPUClass::tlb_fill in cputlb.c
  target/xtensa: Convert to CPUClass::tlb_fill
  target/unicore32: Convert to CPUClass::tlb_fill
  target/tricore: Convert to CPUClass::tlb_fill
  target/tilegx: Convert to CPUClass::tlb_fill
  target/sparc: Convert to CPUClass::tlb_fill
  target/sh4: Convert to CPUClass::tlb_fill
  target/s390x: Convert to CPUClass::tlb_fill
  target/riscv: Convert to CPUClass::tlb_fill
  target/ppc: Convert to CPUClass::tlb_fill
  target/openrisc: Convert to CPUClass::tlb_fill
  target/nios2: Convert to CPUClass::tlb_fill
  target/moxie: Convert to CPUClass::tlb_fill
  target/mips: Convert to CPUClass::tlb_fill
  target/mips: Tidy control flow in mips_cpu_handle_mmu_fault
  target/mips: Pass a valid error to raise_mmu_exception for user-only
  target/microblaze: Convert to CPUClass::tlb_fill
  target/m68k: Convert to CPUClass::tlb_fill
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 		2019-05-16 13:15:08 +01:00
..
Makefile.objs Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
cpu-qom.h target/tricore: Fix LGPL version number 2019-01-30 11:01:46 +01:00
cpu.c target/tricore: Convert to CPUClass::tlb_fill 2019-05-10 11:12:50 -07:00
cpu.h target/tricore: Convert to CPUClass::tlb_fill 2019-05-10 11:12:50 -07:00
csfr.def tricore: added CORE_ID 2018-03-02 11:46:31 +01:00
fpu_helper.c target/tricore: Fix LGPL version number 2019-01-30 11:01:46 +01:00
helper.c tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
helper.h target/tricore: Fix LGPL version number 2019-01-30 11:01:46 +01:00
op_helper.c target/tricore: Convert to CPUClass::tlb_fill 2019-05-10 11:12:50 -07:00
translate.c target/tricore: Use tcg_gen_abs_tl 2019-05-13 22:52:08 +00:00
tricore-defs.h target/tricore: Fix LGPL version number 2019-01-30 11:01:46 +01:00
tricore-opcodes.h target/tricore: Fix LGPL version number 2019-01-30 11:01:46 +01:00