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Peter Maydell ab752f237d x86/cpu/numa queue, 2017-10-27 
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Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging

x86/cpu/numa queue, 2017-10-27

# gpg: Signature made Fri 27 Oct 2017 15:17:12 BST
# gpg:                using RSA key 0x2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-and-machine-pull-request: (39 commits)
  x86: Skip check apic_id_limit for Xen
  numa: fixup parsed NumaNodeOptions earlier
  mips: r4k: replace cpu_model with cpu_type
  mips: mipssim: replace cpu_model with cpu_type
  mips: Magnum/Acer Pica 61: replace cpu_model with cpu_type
  mips: fulong2e: replace cpu_model with cpu_type
  mips: malta/boston: replace cpu_model with cpu_type
  mips: use object_new() instead of gnew()+object_initialize()
  sparc: leon3: use generic cpu_model parsing
  sparc: sparc: use generic cpu_model parsing
  sparc: sun4u/sun4v/niagara: use generic cpu_model parsing
  sparc: cleanup cpu type name composition
  tricore: use generic cpu_model parsing
  tricore: cleanup cpu type name composition
  unicore32: use generic cpu_model parsing
  unicore32: cleanup cpu type name composition
  xtensa: lx60/lx200/ml605/kc705: use generic cpu_model parsing
  xtensa: sim: use generic cpu_model parsing
  xtensa: cleanup cpu type name composition
  sh4: remove SuperHCPUClass::name field
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 		2017-10-30 10:11:22 +00:00
..
Makefile.objs target/openrisc: Streamline arithmetic and OVE 2017-02-14 08:14:59 +11:00
cpu.c openrisc: cleanup cpu type name composition 2017-10-27 16:03:54 +02:00
cpu.h openrisc: cleanup cpu type name composition 2017-10-27 16:03:54 +02:00
exception.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
exception.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
exception_helper.c target/openrisc: Optimize for r0 being zero 2017-02-14 08:15:00 +11:00
fpu_helper.c target/openrisc: Fix madd 2017-02-14 08:15:00 +11:00
gdbstub.c target/openrisc: implement shadow registers 2017-05-04 09:39:01 +09:00
helper.h target/openrisc: Fix madd 2017-02-14 08:15:00 +11:00
interrupt.c target/openrisc: Support non-busy idle state using PMR SPR 2017-05-04 09:39:14 +09:00
interrupt_helper.c target/openrisc: Tidy ppc/npc implementation 2017-02-14 08:15:00 +11:00
machine.c openrisc/cputimer: Perparation for Multicore 2017-10-21 06:35:47 +09:00
mmu.c target/openrisc: Fixes for memory debugging 2017-05-04 09:38:49 +09:00
mmu_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
sys_helper.c openrisc/cputimer: Perparation for Multicore 2017-10-21 06:35:47 +09:00
translate.c Capstone disassembler 2017-10-27 08:04:51 +01:00