mirror of https://gitee.com/openkylin/qemu.git
495 lines
12 KiB
C
495 lines
12 KiB
C
/*
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* QTest testcase for ivshmem
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*
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* Copyright (c) 2014 SUSE LINUX Products GmbH
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* Copyright (c) 2015 Red Hat, Inc.
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include <errno.h>
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#include <fcntl.h>
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#include <glib.h>
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#include <glib/gstdio.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include "contrib/ivshmem-server/ivshmem-server.h"
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#include "libqos/pci-pc.h"
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#include "libqtest.h"
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#define TMPSHMSIZE (1 << 20)
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static char *tmpshm;
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static void *tmpshmem;
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static char *tmpdir;
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static char *tmpserver;
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static void save_fn(QPCIDevice *dev, int devfn, void *data)
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{
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QPCIDevice **pdev = (QPCIDevice **) data;
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*pdev = dev;
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}
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static QPCIDevice *get_device(void)
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{
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QPCIDevice *dev;
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QPCIBus *pcibus;
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pcibus = qpci_init_pc();
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dev = NULL;
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qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
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g_assert(dev != NULL);
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return dev;
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}
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typedef struct _IVState {
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QTestState *qtest;
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void *reg_base, *mem_base;
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QPCIDevice *dev;
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} IVState;
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enum Reg {
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INTRMASK = 0,
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INTRSTATUS = 4,
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IVPOSITION = 8,
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DOORBELL = 12,
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};
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static const char* reg2str(enum Reg reg) {
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switch (reg) {
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case INTRMASK:
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return "IntrMask";
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case INTRSTATUS:
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return "IntrStatus";
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case IVPOSITION:
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return "IVPosition";
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case DOORBELL:
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return "DoorBell";
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default:
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return NULL;
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}
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}
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static inline unsigned in_reg(IVState *s, enum Reg reg)
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{
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const char *name = reg2str(reg);
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QTestState *qtest = global_qtest;
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unsigned res;
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global_qtest = s->qtest;
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res = qpci_io_readl(s->dev, s->reg_base + reg);
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g_test_message("*%s -> %x\n", name, res);
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global_qtest = qtest;
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return res;
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}
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static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
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{
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const char *name = reg2str(reg);
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QTestState *qtest = global_qtest;
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global_qtest = s->qtest;
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g_test_message("%x -> *%s\n", v, name);
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qpci_io_writel(s->dev, s->reg_base + reg, v);
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global_qtest = qtest;
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}
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static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
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{
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uint64_t barsize;
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s->qtest = qtest_start(cmd);
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s->dev = get_device();
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/* FIXME: other bar order fails, mappings changes */
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s->mem_base = qpci_iomap(s->dev, 2, &barsize);
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g_assert_nonnull(s->mem_base);
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g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
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if (msix) {
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qpci_msix_enable(s->dev);
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}
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s->reg_base = qpci_iomap(s->dev, 0, &barsize);
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g_assert_nonnull(s->reg_base);
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g_assert_cmpuint(barsize, ==, 256);
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qpci_device_enable(s->dev);
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}
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static void setup_vm(IVState *s)
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{
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char *cmd = g_strdup_printf("-device ivshmem,shm=%s,size=1M", tmpshm);
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setup_vm_cmd(s, cmd, false);
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g_free(cmd);
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}
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static void test_ivshmem_single(void)
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{
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IVState state, *s;
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uint32_t data[1024];
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int i;
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setup_vm(&state);
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s = &state;
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/* valid io */
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out_reg(s, INTRMASK, 0);
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in_reg(s, INTRSTATUS);
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in_reg(s, IVPOSITION);
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out_reg(s, INTRMASK, 0xffffffff);
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g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
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out_reg(s, INTRSTATUS, 1);
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/* XXX: intercept IRQ, not seen in resp */
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g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
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/* invalid io */
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out_reg(s, IVPOSITION, 1);
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out_reg(s, DOORBELL, 8 << 16);
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for (i = 0; i < G_N_ELEMENTS(data); i++) {
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data[i] = i;
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}
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qtest_memwrite(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
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for (i = 0; i < G_N_ELEMENTS(data); i++) {
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g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
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}
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memset(data, 0, sizeof(data));
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qtest_memread(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
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for (i = 0; i < G_N_ELEMENTS(data); i++) {
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g_assert_cmpuint(data[i], ==, i);
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}
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qtest_quit(s->qtest);
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}
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static void test_ivshmem_pair(void)
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{
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IVState state1, state2, *s1, *s2;
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char *data;
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int i;
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setup_vm(&state1);
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s1 = &state1;
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setup_vm(&state2);
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s2 = &state2;
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data = g_malloc0(TMPSHMSIZE);
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/* host write, guest 1 & 2 read */
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memset(tmpshmem, 0x42, TMPSHMSIZE);
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qtest_memread(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
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for (i = 0; i < TMPSHMSIZE; i++) {
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g_assert_cmpuint(data[i], ==, 0x42);
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}
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qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
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for (i = 0; i < TMPSHMSIZE; i++) {
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g_assert_cmpuint(data[i], ==, 0x42);
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}
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/* guest 1 write, guest 2 read */
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memset(data, 0x43, TMPSHMSIZE);
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qtest_memwrite(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
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memset(data, 0, TMPSHMSIZE);
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qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
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for (i = 0; i < TMPSHMSIZE; i++) {
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g_assert_cmpuint(data[i], ==, 0x43);
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}
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/* guest 2 write, guest 1 read */
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memset(data, 0x44, TMPSHMSIZE);
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qtest_memwrite(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
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memset(data, 0, TMPSHMSIZE);
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qtest_memread(s1->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
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for (i = 0; i < TMPSHMSIZE; i++) {
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g_assert_cmpuint(data[i], ==, 0x44);
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}
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qtest_quit(s1->qtest);
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qtest_quit(s2->qtest);
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g_free(data);
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}
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typedef struct ServerThread {
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GThread *thread;
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IvshmemServer *server;
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int pipe[2]; /* to handle quit */
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} ServerThread;
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static void *server_thread(void *data)
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{
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ServerThread *t = data;
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IvshmemServer *server = t->server;
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while (true) {
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fd_set fds;
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int maxfd, ret;
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FD_ZERO(&fds);
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FD_SET(t->pipe[0], &fds);
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maxfd = t->pipe[0] + 1;
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ivshmem_server_get_fds(server, &fds, &maxfd);
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ret = select(maxfd, &fds, NULL, NULL, NULL);
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if (ret < 0) {
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if (errno == EINTR) {
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continue;
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}
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g_critical("select error: %s\n", strerror(errno));
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break;
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}
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if (ret == 0) {
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continue;
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}
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if (FD_ISSET(t->pipe[0], &fds)) {
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break;
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}
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if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
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g_critical("ivshmem_server_handle_fds() failed\n");
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break;
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}
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}
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return NULL;
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}
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static void setup_vm_with_server(IVState *s, int nvectors)
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{
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char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
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"-device ivshmem,size=1M,chardev=chr0,vectors=%d",
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tmpserver, nvectors);
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setup_vm_cmd(s, cmd, true);
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g_free(cmd);
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}
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static void test_ivshmem_server(void)
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{
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IVState state1, state2, *s1, *s2;
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ServerThread thread;
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IvshmemServer server;
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int ret, vm1, vm2;
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int nvectors = 2;
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guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
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memset(tmpshmem, 0x42, TMPSHMSIZE);
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ret = ivshmem_server_init(&server, tmpserver, tmpshm,
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TMPSHMSIZE, nvectors,
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g_test_verbose());
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g_assert_cmpint(ret, ==, 0);
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ret = ivshmem_server_start(&server);
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g_assert_cmpint(ret, ==, 0);
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setup_vm_with_server(&state1, nvectors);
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s1 = &state1;
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setup_vm_with_server(&state2, nvectors);
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s2 = &state2;
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g_assert_cmpuint(in_reg(s1, IVPOSITION), ==, 0xffffffff);
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g_assert_cmpuint(in_reg(s2, IVPOSITION), ==, 0xffffffff);
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g_assert_cmpuint(qtest_readb(s1->qtest, (uintptr_t)s1->mem_base), ==, 0x00);
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thread.server = &server;
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ret = pipe(thread.pipe);
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g_assert_cmpint(ret, ==, 0);
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thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
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g_assert(thread.thread != NULL);
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/* waiting until mapping is done */
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while (g_get_monotonic_time() < end_time) {
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g_usleep(1000);
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if (qtest_readb(s1->qtest, (uintptr_t)s1->mem_base) == 0x42 &&
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qtest_readb(s2->qtest, (uintptr_t)s2->mem_base) == 0x42) {
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break;
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}
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}
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/* check got different VM ids */
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vm1 = in_reg(s1, IVPOSITION);
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vm2 = in_reg(s2, IVPOSITION);
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g_assert_cmpuint(vm1, !=, vm2);
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global_qtest = s1->qtest;
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ret = qpci_msix_table_size(s1->dev);
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g_assert_cmpuint(ret, ==, nvectors);
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/* ping vm2 -> vm1 */
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ret = qpci_msix_pending(s1->dev, 0);
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g_assert_cmpuint(ret, ==, 0);
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out_reg(s2, DOORBELL, vm1 << 16);
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do {
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g_usleep(10000);
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ret = qpci_msix_pending(s1->dev, 0);
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} while (ret == 0 && g_get_monotonic_time() < end_time);
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g_assert_cmpuint(ret, !=, 0);
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/* ping vm1 -> vm2 */
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global_qtest = s2->qtest;
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ret = qpci_msix_pending(s2->dev, 0);
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g_assert_cmpuint(ret, ==, 0);
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out_reg(s1, DOORBELL, vm2 << 16);
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do {
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g_usleep(10000);
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ret = qpci_msix_pending(s2->dev, 0);
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} while (ret == 0 && g_get_monotonic_time() < end_time);
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g_assert_cmpuint(ret, !=, 0);
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qtest_quit(s2->qtest);
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qtest_quit(s1->qtest);
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if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
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g_error("qemu_write_full: %s", g_strerror(errno));
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}
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g_thread_join(thread.thread);
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ivshmem_server_close(&server);
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close(thread.pipe[1]);
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close(thread.pipe[0]);
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}
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#define PCI_SLOT_HP 0x06
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static void test_ivshmem_hotplug(void)
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{
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gchar *opts;
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qtest_start("");
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opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
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qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
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qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
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qtest_end();
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g_free(opts);
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}
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static void test_ivshmem_memdev(void)
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{
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IVState state;
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/* just for the sake of checking memory-backend property */
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setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
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" -device ivshmem,x-memdev=mb1", false);
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qtest_quit(state.qtest);
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}
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static void cleanup(void)
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{
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if (tmpshmem) {
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munmap(tmpshmem, TMPSHMSIZE);
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tmpshmem = NULL;
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}
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if (tmpshm) {
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shm_unlink(tmpshm);
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g_free(tmpshm);
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tmpshm = NULL;
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}
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if (tmpserver) {
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g_unlink(tmpserver);
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g_free(tmpserver);
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tmpserver = NULL;
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}
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if (tmpdir) {
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g_rmdir(tmpdir);
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tmpdir = NULL;
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}
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}
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static void abrt_handler(void *data)
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{
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cleanup();
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}
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static gchar *mktempshm(int size, int *fd)
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{
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while (true) {
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gchar *name;
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name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
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*fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
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S_IRWXU|S_IRWXG|S_IRWXO);
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if (*fd > 0) {
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g_assert(ftruncate(*fd, size) == 0);
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return name;
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}
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g_free(name);
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if (errno != EEXIST) {
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perror("shm_open");
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return NULL;
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}
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}
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}
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int main(int argc, char **argv)
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{
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int ret, fd;
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gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
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#if !GLIB_CHECK_VERSION(2, 31, 0)
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if (!g_thread_supported()) {
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g_thread_init(NULL);
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}
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#endif
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g_test_init(&argc, &argv, NULL);
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qtest_add_abrt_handler(abrt_handler, NULL);
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/* shm */
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tmpshm = mktempshm(TMPSHMSIZE, &fd);
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if (!tmpshm) {
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return 0;
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}
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tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
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g_assert(tmpshmem != MAP_FAILED);
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/* server */
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if (mkdtemp(dir) == NULL) {
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g_error("mkdtemp: %s", g_strerror(errno));
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}
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tmpdir = dir;
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tmpserver = g_strconcat(tmpdir, "/server", NULL);
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qtest_add_func("/ivshmem/single", test_ivshmem_single);
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qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
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qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
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if (g_test_slow()) {
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qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
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qtest_add_func("/ivshmem/server", test_ivshmem_server);
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}
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ret = g_test_run();
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cleanup();
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return ret;
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}
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