qemu/target-arm
Peter Maydell e20d84c140 target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF
The v8 ARM ARM defines that unused spaces in the ID_AA64* system
register ranges are Reserved and must RAZ, rather than being UNDEF.
Implement this.

In particular, ARM v8.2 adds a new feature register ID_AA64MMFR2,
and newer versions of the Linux kernel will attempt to read this,
which causes them not to boot up on versions of QEMU missing this fix.

Since the encoding .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 6
is actually defined in ARMv8 (as ID_MMFR4), we give it an entry in
the ARMCPU struct so CPUs can override it, though since none do
this too will just RAZ.

Cc: qemu-stable@nongnu.org
Reported-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1455890863-11203-1-git-send-email-peter.maydell@linaro.org
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
2016-02-26 15:09:42 +00:00
..
Makefile.objs target-arm: support QMP dump-guest-memory 2016-01-15 14:40:25 +00:00
arch_dump.c arm: Clean up includes 2016-01-29 15:07:23 +00:00
arm-semi.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
arm_ldst.h softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
cpu-qom.h target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF 2016-02-26 15:09:42 +00:00
cpu.c target-arm: Add the pmceid0 and pmceid1 registers 2016-02-18 14:16:17 +00:00
cpu.h target-arm: Fix handling of SDCR for 32-bit code 2016-02-26 15:09:42 +00:00
cpu64.c target-arm: Add the pmceid0 and pmceid1 registers 2016-02-18 14:16:17 +00:00
crypto_helper.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
gdbstub.c target-arm: Add write_type argument to cpsr_write() 2016-02-26 15:09:41 +00:00
gdbstub64.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
helper-a64.c target-arm: Move aarch64_cpu_do_interrupt() to helper.c 2016-01-21 14:15:08 +00:00
helper-a64.h target-arm: A64: Implement CRC instructions 2014-06-09 16:06:12 +01:00
helper.c target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF 2016-02-26 15:09:42 +00:00
helper.h target-arm: Give CPSR setting on 32-bit exception return its own helper 2016-02-26 15:09:41 +00:00
internals.h target-arm: Move bank_number() into internals.h 2016-02-18 14:16:16 +00:00
iwmmxt_helper.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
kvm-consts.h all: Clean up includes 2016-02-23 12:43:05 +00:00
kvm-stub.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
kvm.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
kvm32.c target-arm: Add write_type argument to cpsr_write() 2016-02-26 15:09:41 +00:00
kvm64.c target-arm: Raw CPSR writes should skip checks and bank switching 2016-02-26 15:09:41 +00:00
kvm_arm.h target-arm: kvm - add support for HW assisted debug 2015-12-17 13:37:15 +00:00
machine.c target-arm: Raw CPSR writes should skip checks and bank switching 2016-02-26 15:09:41 +00:00
neon_helper.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c target-arm: Raw CPSR writes should skip checks and bank switching 2016-02-26 15:09:41 +00:00
psci.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
translate-a64.c target-arm: Add isread parameter to CPAccessFns 2016-02-11 11:17:31 +00:00
translate.c target-arm: Give CPSR setting on 32-bit exception return its own helper 2016-02-26 15:09:41 +00:00
translate.h tcg: Remove gen_intermediate_code_pc 2015-10-07 20:36:52 +11:00