mirror of https://gitee.com/openkylin/qemu.git
133 lines
4.8 KiB
C
133 lines
4.8 KiB
C
/*
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* Copyright (c) 2019, Max Filippov, Open Source and Linux Lab.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Open Source and Linux Lab nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "sysemu/reset.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "hw/pci-host/gpex.h"
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#include "net/net.h"
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#include "elf.h"
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#include "exec/memory.h"
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#include "qemu/error-report.h"
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#include "xtensa_memory.h"
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#include "xtensa_sim.h"
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static void create_pcie(CPUXtensaState *env, int irq_base, hwaddr addr_base)
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{
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hwaddr base_ecam = addr_base + 0x00100000;
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hwaddr size_ecam = 0x03f00000;
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hwaddr base_pio = addr_base + 0x00000000;
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hwaddr size_pio = 0x00010000;
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hwaddr base_mmio = addr_base + 0x04000000;
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hwaddr size_mmio = 0x08000000;
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MemoryRegion *ecam_alias;
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MemoryRegion *ecam_reg;
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MemoryRegion *pio_alias;
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MemoryRegion *pio_reg;
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MemoryRegion *mmio_alias;
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MemoryRegion *mmio_reg;
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DeviceState *dev;
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PCIHostState *pci;
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qemu_irq *extints;
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int i;
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dev = qdev_new(TYPE_GPEX_HOST);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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/* Map only the first size_ecam bytes of ECAM space. */
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ecam_alias = g_new0(MemoryRegion, 1);
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ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
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memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam",
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ecam_reg, 0, size_ecam);
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memory_region_add_subregion(get_system_memory(), base_ecam, ecam_alias);
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/*
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* Map the MMIO window into system address space so as to expose
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* the section of PCI MMIO space which starts at the same base address
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* (ie 1:1 mapping for that part of PCI MMIO space visible through
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* the window).
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*/
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mmio_alias = g_new0(MemoryRegion, 1);
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mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
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memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio",
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mmio_reg, base_mmio, size_mmio);
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memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias);
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/* Map IO port space. */
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pio_alias = g_new0(MemoryRegion, 1);
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pio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 2);
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memory_region_init_alias(pio_alias, OBJECT(dev), "pcie-pio",
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pio_reg, 0, size_pio);
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memory_region_add_subregion(get_system_memory(), base_pio, pio_alias);
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/* Connect IRQ lines. */
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extints = xtensa_get_extints(env);
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for (i = 0; i < GPEX_NUM_IRQS; i++) {
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void *q = extints[irq_base + i];
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, q);
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gpex_set_irq_num(GPEX_HOST(dev), i, irq_base + i);
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}
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pci = PCI_HOST_BRIDGE(dev);
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if (pci->bus) {
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for (i = 0; i < nb_nics; i++) {
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NICInfo *nd = &nd_table[i];
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if (!nd->model) {
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nd->model = g_strdup("virtio");
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}
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pci_nic_init_nofail(nd, pci->bus, nd->model, NULL);
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}
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}
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}
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static void xtensa_virt_init(MachineState *machine)
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{
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XtensaCPU *cpu = xtensa_sim_common_init(machine);
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CPUXtensaState *env = &cpu->env;
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create_pcie(env, 0, 0xf0000000);
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xtensa_sim_load_kernel(cpu, machine);
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}
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static void xtensa_virt_machine_init(MachineClass *mc)
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{
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mc->desc = "virt machine (" XTENSA_DEFAULT_CPU_MODEL ")";
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mc->init = xtensa_virt_init;
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mc->max_cpus = 32;
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mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
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}
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DEFINE_MACHINE("virt", xtensa_virt_machine_init)
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